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Alternative option for GPIO External Interrupt for fast signals

sreyas40
Senior

Hello, 

I'm using Nucleo H723ZG.

In my project, i need to detect a rising edge to trigger a callback. What i have done is that i setup a GPIO as external interrupt, and i verified the code by manually connecting and releasing from 3v3 pin. The actual signal i want to trigger is high for approx 38ns , and the callback is not triggering.

What is the best solution for this?

System operating at - 480MHz

Peripheral clocks - 60MHz

Timer clocks - 120MHz

 

edit : Can i use Timer input capture for that, does using it in one pulse mode mean it detects a rising edge and then resets until next trigger (as a slave timer)

edit: I tried the timer input capture too, but still same effect, I used the HAL_TIM_IC_CaptureCallback , One pulse mode is enabled, it is in slave mode, I even applied a 1MHz signal still callback is not triggering, when i applied a 100KHz signal the callback triggers properly. 

edit: upto 400KHz signal the below callback is properly triggering

void HAL_TIM_IC_CaptureCallback(TIM_HandleTypeDef *htim){
	if(htim == &htim4){
	strcpy(uart_buf,"triggering - meh\n\r");
	HAL_UART_Transmit_DMA(&huart3,(uint8_t*)uart_buf, sizeof(uart_buf));
	}
}

edit: It seem the Interrupts were triggering, but due to large number of interrupts, the MCU was not able to execute anything. What i want to achieve is that i want to initiate SPI in DMA mode after it overflows (update event), will enabling DMA for timer help?

24 REPLIES 24
@waclawek.jan wrote:

Make sure the signal has voltages for valid logic levels for your VDD.


+1

 


@sreyas40 wrote:

 i verified the signal in a logic analyzer. 


Are you sure your logic analyser's logic thresholds match those of your STM32?

Would be worth also using an oscilloscope to verify that all is good in the analogue domain ...

A complex system that works is invariably found to have evolved from a simple system that worked.
A complex system designed from scratch never works and cannot be patched up to make it work.

1 MHz is too fast for any uCPU, as its needs time to process interrupt request, 1-2 usec.

Plz, describe your project, sure there is another way to get results w/o overloading hardware

@MasterT 

i'm trying to write code to interface an ADC chip, The ADC outputs a ready signal within every 600ns , i need to detect it to start SPI reception.

and you were right too, it can max detect signals upto 2.5usec.

sreyas40_0-1762489087401.png

Maybe instead of detecting it i could just start SPI after 315ns which is the delay for ready signal to occur after CONVST high which i'm passing to the microcontroller. But will that result in any data error?

Microcontroller:

sreyas40_1-1762487267936.png

Logic Analyzer:

sreyas40_2-1762487417466.png

This is fine ig?

@Andrew Neil

@Ozone yes you were right , the interrupt is the issue.

For fast signals, the interrupt gets triggered but the interrupt keeps coming in a way it cannot execute code in the main loop or anything at all.

 

@waclawek.jan 

@MasterT 

 

> For fast signals, the interrupt gets triggered but the interrupt keeps coming in a way it cannot execute code in the main loop or anything at all.

I suggest you describe what you actually want to achieve with your project.
It seems the concept you worked out is not workable.

Microcontrollers like Cortex M are not specifically designed for high interrupt loads and interrupt cadence.
A Cortex M needs 12 clock cycles to enter an interrupt handler, and another 12 cycle to exit. Not even counting instructions inside the handler yet.
Thus you can calculate the saturation point, i.e. the interrupt frequency at which the core is 100% busy by entering and exiting an interrupt alone, without achieving anything.
In high-load scenarios, you need to make use of DMAs, FIFOs and other hardware-supported mechanisms to reduce the amount of core cycles required.

As said, better tell us what you want to achieve. Most probably there are alternatives to your idea.

@Ozone 

I want to interface with a precision ADC.

The cycle for conversion and acquisition is about 600ns. at every 315ns of the cycle i need to trigger SPI reception.

An external ADC ?
And at full speed ?
This sounds more like a video or radar application, or high-speed motor control.
Not the best choices for a beginner, I would say. Not to mention, that analogue interface section is far from trivial, too.

Do you want sample data at this high speed, or a cycle-by-cycle control ?

@Ozone 

Yes an external ADC, currently i'm interfacing with the evaluation board, The ADC is capable of 3MSPS, but current setup is for 1.5MSPS. This is for a sensor.

Yes i need to sample at high speed

It would help to give the part number of this ADC - then people could look at the specs, and maybe make suggestions...

 

Also, have you checked out the manufacturer's support collateral for the ADC?

They probably have Application Notes, Reference Designs, etc illustrating ways to use it ...

A complex system that works is invariably found to have evolved from a simple system that worked.
A complex system designed from scratch never works and cannot be patched up to make it work.