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ADC to DMA not working on Nucleo-U545RE-Q

schnitzele
Associate

Hello.

I have problems to get DMA with ADC working.

I'd like to collect 2 values from PA3 and PA4 and store them in an array (convertedData_u16). I configured ADC1 with Channels 8 and 9, and GPDMA1 with Channel1.

I can see that data is being collected in ADC1->DR (cannot validate if they are plausible at the moment).

What I also see is that the clocks for GPIOA, ADC1 and GPDMA1 are enabled (RCC_AHB1ENR->GPDMA1EN = 1; RCC_AHB2ENR1->GPIOAEN = 1; RCC_AHB2ENR1->ADC12EN = 1) and ADC1 (ADC1_CR->ADEN = 1) and GPDMA1 Channel1 (GPDMA_C1CR->EN = 1) are enabled.

However, I have not achieved to get data into convertedData_u16.

What is wrong with my code? What else can I do to find the error?

 

 

 

#include "main.h"

#define DMA_PERIPHERAL					GPDMA1
#define DMA_CHANNEL						LL_DMA_CHANNEL_1

#define	ADC_PERIPHERAL					ADC1

#define ADC_CHANNEL_COUNT				2

#define ADC_CONVERTED_DATA_BUFFER_SIZE   ((uint32_t)  32)   /* Size of array aADCxConvertedData[] */

ADC_HandleTypeDef hadc1;
DMA_HandleTypeDef hdma1;

static uint16_t convertedData_u16[ADC_CHANNEL_COUNT];

void SystemClock_Config(void);
void ADC1_IRQHandler(void);
void GPDMA1_Channel1_IRQHandler(void);
void InitADC_V();
void InitDMA_V(void);
void ConfigurePorts_V();

int main(void)
{	
	HAL_Init();
	
	__HAL_RCC_PWR_CLK_ENABLE();
	HAL_PWREx_EnableVddA();

	SystemClock_Config();

	ConfigurePorts_V();
	InitADC_V();
	InitDMA_V();

	LL_ADC_EnableIT_EOS(ADC_PERIPHERAL); // End of sequence flag

	while (1)
	{
		HAL_ADC_Start_DMA(&hadc1, (uint32_t *)convertedData_u16,
						(ADC_CONVERTED_DATA_BUFFER_SIZE));
		
		HAL_Delay(1000);
	}
}

void Error_Handler(void)
{
  __disable_irq();
  while (1)
  {
  }
}

void SystemClock_Config(void)
{
  RCC_OscInitTypeDef RCC_OscInitStruct = {0};
  RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};

  /** Configure the main internal regulator output voltage
  */
  if (HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1) != HAL_OK)
  {
    Error_Handler();
  }

  /** Initializes the CPU, AHB and APB buses clocks
  */
  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI|RCC_OSCILLATORTYPE_MSI;
  RCC_OscInitStruct.HSIState = RCC_HSI_ON;
  RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
  RCC_OscInitStruct.MSIState = RCC_MSI_ON;
  RCC_OscInitStruct.MSICalibrationValue = RCC_MSICALIBRATION_DEFAULT;
  RCC_OscInitStruct.MSIClockRange = RCC_MSIRANGE_4;
  RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
  RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_MSI;
  RCC_OscInitStruct.PLL.PLLMBOOST = RCC_PLLMBOOST_DIV1;
  RCC_OscInitStruct.PLL.PLLM = 1;
  RCC_OscInitStruct.PLL.PLLN = 80;
  RCC_OscInitStruct.PLL.PLLP = 2;
  RCC_OscInitStruct.PLL.PLLQ = 2;
  RCC_OscInitStruct.PLL.PLLR = 2;
  RCC_OscInitStruct.PLL.PLLRGE = RCC_PLLVCIRANGE_0;
  RCC_OscInitStruct.PLL.PLLFRACN = 0;
  if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
  {
    Error_Handler();
  }

  /** Initializes the CPU, AHB and APB buses clocks
  */
  RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
                              |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2
                              |RCC_CLOCKTYPE_PCLK3;
  RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
  RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
  RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
  RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
  RCC_ClkInitStruct.APB3CLKDivider = RCC_HCLK_DIV1;

  if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK)
  {
    Error_Handler();
  }
}

void ConfigurePorts_V(void)
{
    __HAL_RCC_GPIOA_CLK_ENABLE();

	GPIO_InitTypeDef GPIO_InitStruct = { 0 };
	
	GPIO_InitStruct.Pin = GPIO_PIN_3 | GPIO_PIN_4;
	GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
	GPIO_InitStruct.Pull = GPIO_NOPULL;
	HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
}

void InitDMA_V(void)
{
	__HAL_RCC_GPDMA1_CLK_ENABLE();

	hdma1.Instance = GPDMA1_Channel1;
	hdma1.Init.Request = GPDMA1_REQUEST_ADC1;
	hdma1.Init.BlkHWRequest = DMA_BREQ_BLOCK;
	hdma1.Init.Direction = DMA_PERIPH_TO_MEMORY;
	hdma1.Init.SrcInc = DMA_SINC_FIXED;
	hdma1.Init.DestInc = DMA_DINC_INCREMENTED;
	hdma1.Init.SrcDataWidth = DMA_SRC_DATAWIDTH_WORD;
	hdma1.Init.DestDataWidth = DMA_DEST_DATAWIDTH_WORD;
	hdma1.Init.Priority = DMA_LOW_PRIORITY_LOW_WEIGHT;
	hdma1.Init.SrcBurstLength = 1;
	hdma1.Init.DestBurstLength = 1;
	hdma1.Init.TransferAllocatedPort = DMA_SRC_ALLOCATED_PORT0|DMA_DEST_ALLOCATED_PORT0;
	hdma1.Init.TransferEventMode = DMA_TCEM_BLOCK_TRANSFER;
	hdma1.Init.Mode = DMA_NORMAL;
	HAL_DMA_Init(&hdma1);
	
	__HAL_LINKDMA(&hadc1, DMA_Handle, hdma1);
	
	NVIC_SetPriority(GPDMA1_Channel1_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(),0, 0));
	NVIC_EnableIRQ(GPDMA1_Channel1_IRQn);
}


void InitADC_V(void)
{  
	ADC_ChannelConfTypeDef sConfig = {0};

//	LL_RCC_SetADCDACClockSource(LL_RCC_ADCDAC_CLKSOURCE_HSI);
	__HAL_RCC_ADC1_CLK_ENABLE();
	
	hadc1.Instance = ADC_PERIPHERAL;
	hadc1.Init.ClockPrescaler = ADC_CLOCK_ASYNC_DIV128;
	hadc1.Init.Resolution = ADC_RESOLUTION_12B;
	hadc1.Init.GainCompensation = 0;
	hadc1.Init.DataAlign = ADC_DATAALIGN_RIGHT;
	hadc1.Init.ScanConvMode = ADC_SCAN_ENABLE;
	hadc1.Init.EOCSelection = ADC_EOC_SINGLE_CONV;
	hadc1.Init.LowPowerAutoWait = DISABLE;
	hadc1.Init.ContinuousConvMode = DISABLE;
	hadc1.Init.NbrOfConversion = 2;
	hadc1.Init.DiscontinuousConvMode = DISABLE;
	hadc1.Init.ExternalTrigConv = ADC_SOFTWARE_START;
	hadc1.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE;
	hadc1.Init.DMAContinuousRequests = ENABLE;
	hadc1.Init.TriggerFrequencyMode = ADC_TRIGGER_FREQ_HIGH;
	hadc1.Init.Overrun = ADC_OVR_DATA_PRESERVED;
	hadc1.Init.LeftBitShift = ADC_LEFTBITSHIFT_NONE;
	hadc1.Init.ConversionDataManagement = ADC_CONVERSIONDATA_DR;
	hadc1.Init.OversamplingMode = DISABLE;
	HAL_ADC_Init(&hadc1);

	sConfig.Channel = ADC_CHANNEL_9;
	sConfig.Rank = ADC_REGULAR_RANK_2;
	sConfig.SamplingTime = ADC_SAMPLETIME_5CYCLE;
	sConfig.SingleDiff = ADC_SINGLE_ENDED;
	sConfig.OffsetNumber = ADC_OFFSET_NONE;
	sConfig.Offset = 0;
	HAL_ADC_ConfigChannel(&hadc1, &sConfig);

	sConfig.Channel = ADC_CHANNEL_8;
	sConfig.Rank = ADC_REGULAR_RANK_1;
	HAL_ADC_ConfigChannel(&hadc1, &sConfig);

 	LL_ADC_EnableIT_EOS(ADC_PERIPHERAL);
	
	LL_ADC_StartCalibration(ADC_PERIPHERAL, LL_ADC_SINGLE_ENDED);
	
	HAL_Delay(50);

	NVIC_SetPriority(ADC1_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(), 0, 0));
	NVIC_EnableIRQ(ADC1_IRQn);
}

void GPDMA1_Channel1_IRQHandler(void)
{
	if (LL_DMA_IsActiveFlag_TC(DMA_PERIPHERAL, DMA_CHANNEL) == 1)
	{
		LL_DMA_ClearFlag_TC(DMA_PERIPHERAL, DMA_CHANNEL);
	}
}

void ADC1_IRQHandler(void)
{
	if (LL_ADC_IsActiveFlag_EOS(ADC_PERIPHERAL))
	{
		LL_ADC_ClearFlag_EOS(ADC_PERIPHERAL);
	}
	else if (LL_ADC_IsActiveFlag_EOC(ADC_PERIPHERAL))
	{
		LL_ADC_ClearFlag_EOC(ADC_PERIPHERAL);
	}
	else if (LL_ADC_IsActiveFlag_OVR(ADC_PERIPHERAL) != 0)
	{
		LL_ADC_ClearFlag_OVR(ADC_PERIPHERAL);
	}
	else if (LL_ADC_IsActiveFlag_EOSMP(ADC_PERIPHERAL) != 0) // Ist nicht aktiviert
	{
		LL_ADC_ClearFlag_EOSMP(ADC_PERIPHERAL);
	}
}

 

 

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