ADC oversampling result ramping in seconds

[Zheng Liang]

I'm using STM32F303 to sampling the multiple analog signals, and for higher resolution, I was oversampling every channel, but I found out all the signals were ramping with same period and same time.

For figuring out the problem, I did a lot of tests, and the diagram below is one scenario that only sampling interval Vref and one of signals:

[Green: Vref * 32 - averageOfVrefs + 50

Blue: Vmea * 32 - averageOfVmeas - 50

X: seconds]

​

What's this diagram resluting from? Changing ADC clock prescaler or channel sampling time not optimize the result much.

In general I did oversample 7 signals, they also ramping in same period and same time like the behavior.

Any guys had met with this problems? Any help will be apperciate, thanks.

​---------------------------Update 04/06---------------------------

I did test on a Nuleo F303RE board and replace the singal as a floating analog input, so the diagram is showing below:

so, why the data from floating pin is showing same distributing with ramping, I think the source problem is same with I'm facing now.

Still not figure out the reason.

[Michal Dudka]

Measure AVDD noise/stability.

[Zheng Liang]

I will test these, I update a figure when samping floating pin instead signal source on ST'office evaluation board, the floating data also show ramping slope, this scenerio looks like a exaggerated problem I faced, this might not caused by AVDD stability I think.

[Javier1]

this might be a variable type castig issue, check your math and make sure youre not overflowing integers or mixing signed with unsigned types.

[Michal Dudka]

Measuring floating pin makes no sense. Good point noticed Javier.

[Zheng Liang]

It's not caused by code, below picture is a no summing result directly from ADC conversation, it shows the behavior same with oversampling result.

[Zheng Liang]

@Amel NASRI​ Hello, Mayla, I find a old thread talking about STM32F3's current consumption https://community.st.com/s/question/0D50X00009Xkgk5/current-consumption-behaves-like-sawtooth, and you left your reply there said that is caused by the internal 1.8V regulator.

In our case, we are using 303CC model, we found samiliar phenomenon with current sawtooth waveform about 20s period, and followed by VDDA/VDD sawtooth, final result is ADC results behave like sawtooth which we wanna resolved.

So if there any idea to eliminate sawtooth? We tried insert bead between VDDA and VDD, values of capacitor around VDDA/VDD pin, seems nothing changed, we cost more than two months but nothing improved until now.

If you can help, we are appreciated.