32 bit limit on chained 16 bit timers

[RHerm.3]

Working with a L4R5. I have chained TIM1 & TIM3 to create a 32 bit 1mS counter.

Is it possible to reset both counters on an arbitrary 32 bit value?

I would like to limit the count to 0x240c_8400; msec in one week.

I understand how to reset a timer based on the value of a 2nd, but do not see a way to use the combined value of two timers.

[TDK]

You want to generate an update event, or reset when TIM1->CNT= 0x240C and TIM3->CNT = 0x8400? No, you can't do that.

[RHerm.3]

Actually the other way around - but that doesn't change anything.

Thanks for confirming that you can't do it.

[waclawek.jan]

You can have the faster timer roll over at minutes (i.e. ARR=60000-1) and then the slower at 60*24*7=10080 (i.e. ARR=10080-1), and leave them running freely.

You'd then need to perform some math when using the time.

Reading them out is a nonatomic operation so you need to perform the read-twice-and-compare-to-choose-properly drill anyway.

JW

[waclawek.jan]

You can also set slow timer's ARR to 0x240C, and use the slow timer to trigger DMA transfer (e.g. from Compare set to the last value) which would write 0x83FF to the fast timer's ARR, and then another (e.g. from Update) to restore it to 0xFFFF. This might require testing and tweaking, I believe ARR preload of the fast timer should be off.

Or just simply use interrupt to do the same.

JW

[RHerm.3]

Thanks for the ideas.

I'm actually going to switch a 16 bit timer where I was using a 32 bit timer and don't need the resolution.

Then use the 32 bit timer for the mSec counter.