2019 STM32 Wish List

[Amel NASRI]

Dear Community Members & STM32 fans,

Let’s end 2018 thanking you for your involvement in our Community and wishing you all the best for 2019!

As already done in 2017 (https://community.st.com/s/feed/0D50X00009bLPmvSAG) and in 2018 (https://community.st.com/s/feed/0D50X00009bLSAKSA4), we open this space to hear from you.

This is an opportunity for us to evaluate what we deliver as offer and to know your expectations.

If we come back to the STM32 portfolio end of last year, it was like this:

Now the image is getting larger with new products as well as ecosystem components:

Compared to the wishes you shared previous years, we weren’t able to answer all proposals for sure, but may be some of our solutions met what you looked for. Like for example: delivering .ioc file in the STM32Cube package which we started with STM32G0...

Either you are a follower of the STM32 history as well as the Community updates, or a new member in this space, would you mind share with us your feedback answering the following 3 questions:

• What shouldn’t be done (don’t say migration to new Community platform or new CubeMX interface (because both of them will be improved)?
• What you appreciate the most as STM32 related offer?
• What do you expect/suggest related to the STM32 and its ecosystem?

All together, keep UP our STM32 Community!

[Amel NASRI]

Welcome on-board, hope you enjoy the experience with the STM32!

You find some resources that should help you in the STM32 Education page: https://www.st.com/content/st_com/en/support/learning/stm32-education.html.

I recommend you to follow the STM32 step-by-step (https://www.st.com/content/st_com/en/support/learning/stm32-education/stm32-step-by-step.html).

It is not based on STM32F4 and Keil, but it provides main steps to follow.

-Amel

[Rob.Riggs]

A forum I can visit from all of my devices. I am down to one browser that allows me to view content on this site without getting stuck in a "cookie policy" loop that blocks access to the site.

[Joerg Wagner]

Please change the handling of CubeMX 5.0.1. I got so many unwanted popup messages (details and documentation), it's annoying. The workflow is so much slower right now.

And what I'm missing are the pin names in case of a conflict. Just the resource is displayed, i.e. SPI3 (Full-Duplex Master), but which pin is already in use? Not very helpful.

[AVI-crak]

Add DMA ring buffer mode. I want him to check the new data counter (head), and automatically work with the data, while increasing the processed data counter (tail). DMA operation in this mode will be very simple for the user, with minimal overhead. Ring buffers are used very often, and they are always software. You will have lots of examples to follow.

DDR SDRAM memory on a chip, possibly the second floor, but always in monolithic execution.

You have a very good start with the STM32G0 series. If you manage to keep the direction in the development of this series - it will be perfect. Prompt how to do well probably does not make sense. There is a suggestion:

Organize in your company a few new jobs, with the post of designer of final products on your products. No matter how popular these products are, and sales plans are not important either. It is important to fix the difficulties that your developers will face. All these problems, big and not so much - all of them will arise for your users. Your personal developer will always be able to reasonably show the weaknesses of the product, without using a broken phone as an external forum. This is feedback with minimal latency.

[Rob.Riggs]

What's wrong with the current DMA circular buffer implementation? Have you used it? How do you see a ring buffer being different from what is already available?

[Amel NASRI]

Hi @Joerg Wagner​ ,

The wishlist is a long-term action to follow. For such issues you are facing with STM32CubeMX, I recommend you to create a dedicated question with the topic "STM32CubeMX" to report them.

-Amel

[AVI-crak]

DMA in the present version of the ring - works without stopping, or requires flag maintenance. After stopping, requires a full setup on the balance of data transfer. It has only one parameter - the amount of data in the ring. There are no markers of the tail and head - like real ring buffers.

My suggestion in the hardware implementation of the ring buffer. To do this, you need to add two counters - the head and tail. The tail counter will be controlled by the DMA, and it cannot skip the position of the head counter. That is, DMA should be able to stop and start independently with new data, without external maintenance. The user must record the new data above the head counter, without catching the tail, and update the head counter. After which the DMA must transfer the data itself.

Ring mode and ring buffer are different ways of managing information.

Read about the work of ring buffers, and find the differences.

The closest hardware implementation of the ring buffer is the FIFO. Device with input / output at one address. If it is supplemented with a counter of free data cells, then it will turn out even better than the ring buffer. ST has already applied FIFO in its products, in the shadow mode, without the possibility of user intervention.

Here you need all the same, only with an external indicator of free memory cells.

[Tesla DeLorean]

STM32 Cube Programmer GUI to be able to WRITE .BIN or .HEX files, ie read content of part and save to disk.

[matic]

DLL for ST-Link to use them in mass production... Loading user data to flash after chip is programmed should be fast...

[andy2399]

Make STM32CubeMX open source.

Andy