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Mismatch of current sensing with 3-shunt topology at the EVSPIN32G4 board

rokkie
Associate II

Hello,

 

I'm struggling with frequent overcurrent faults at the EVSPIN32G4 board.

I found some mismatch of current sensing with 3-shunt and 2-OPAMP topology.

Default current sensing for EVSPIN32G4 is described as following diagram at motor control workbench.

 rokkie_0-1747378016453.png

But, the EVSPIN32G4 schematic drawing is as follows. 

rokkie_1-1747378234561.png

It is a mismatch of the MC workbench and the schematic of EVSPIN32G4  

[MC workbench : W Phase] OPAMP2 (+) : PB0, OPAMP2 (-) : PC5, OPAMP2 (out) : PA6

[Schematic: V PhaseOPAMP2 (+) : PA7, OPAMP2 (-) : PC5, OPAMP2 (out) : PA6 

 

I'm wondering about this mismatch and it might be the cause of overcurrent fault.  

Thanks for any advice in advance.

 

 

 

 

 

 

1 ACCEPTED SOLUTION

Accepted Solutions
rokkie
Associate II

Thanks for the quick response. 

As you mentioned it at the MC workbench diagram, 

W phase is connected with OPAMP2 pins through GPIOs as follows : PB0(IN+), PC5(IN-), and PA6(OUT).

But, as according to following table from the EVSPIN32G4 schematic, 

OPAMP2 pins are connected with GPIOs : PA2(IN+), PA7(IN-) and  PA6(OUT) .

rokkie_0-1747463604923.png

I would like to know this H/W current sensing topology be matched with the automatic generated codes by the MC workbench.

 

View solution in original post

4 REPLIES 4
GMA
ST Employee

Hello @rokkie,

Using MCSDK6.3.2, I have a correct description on current sensing:

GMA_0-1747382422739.png

Are you using a modified board description?

 

 

If you agree with the answer, please accept it by clicking on 'Accept as solution'.
Best regards.
GMA
rokkie
Associate II

No. I am using the original EVSPIN32G4 board. 

As I mentioned it, the current sensing is a little different between MC workbench and EVSPIN32G4 schematic. 

GMA
ST Employee

Hello @rokkie,

Maybe I did not catch your point.
In workbench schematic you can notice that V Phase is a Shared Phase between OPAMP1+ and OPAMP2+ (thanks to OpAmp + input mux). Then OPAMP2 (+) input could be PB0 or PA7.

If you agree with the answer, please accept it by clicking on 'Accept as solution'.
Best regards.
GMA
rokkie
Associate II

Thanks for the quick response. 

As you mentioned it at the MC workbench diagram, 

W phase is connected with OPAMP2 pins through GPIOs as follows : PB0(IN+), PC5(IN-), and PA6(OUT).

But, as according to following table from the EVSPIN32G4 schematic, 

OPAMP2 pins are connected with GPIOs : PA2(IN+), PA7(IN-) and  PA6(OUT) .

rokkie_0-1747463604923.png

I would like to know this H/W current sensing topology be matched with the automatic generated codes by the MC workbench.