Hello,
I am wondering why the STmicro example code (STM32CubeH7) does not use the interrupt attribute for defining exception handlers.
The difference I have noted when using this attribute is that it forces the stack alignement to 8 bytes:
Example:
void f(void);
void handler(void)
{
return f();
}
compiles with arm-none-eabi-gcc 10.2.1 and -O1 -mthumb -mcpu=cortex-m7 in:
handler():
push {r3, lr}
bl f()
pop {r3, pc}
whereas if I add the attribute "interrupt":
handler():
mov r0, sp
bic r1, r0, #7
mov sp, r1
push {r0, lr}
bl f()
pop {r0, lr}
mov sp, r0
bx lr
One can see the difference is in the 3 first instructions that align the stack to 8 bytes. Indeed the stack is not always aligned to 8 bytes inside a function. From the Procedure Call Standard:
6.2.1.1 Universal stack constraints
At all times the following basic constraints must hold:
Stack-limit ≤ SP ≤ stack-base. The stack pointer must lie within the extent of the stack.
SP mod 4 = 0. The stack must at all times be aligned to a word boundary.
A process may only store data in the closed interval of the entire stack delimited by [SP, stack base - 1] (where SP is the value of register r13).
Note
This implies that instructions of the following form can fail to satisfy the stack discipline constraints, even when reg points within the extent of the stack.
ldmxx reg, {..., sp, ...} // reg != sp
If execution of the instruction is interrupted after sp has been loaded, the stack extent will not be restored, so restarting the instruction might violate the third constraint.
6.2.1.2 Stack constraints at a public interface
The stack must also conform to the following constraint at a public interface:
SP mod 8 = 0. The stack must be double-word aligned.
So my questions are:
1) why the interrupt attribute is not used in STMicro code ?
2) is there a functional impact to this potentiel bad alignment ?
