2026-03-18 1:59 AM - last edited on 2026-03-18 2:06 AM by mƎALLEm
Split from this post.
Hello,
Sorry to bother you again, but it seems that since yesterday (when I enabled the CAN bus), the UART on my Nucleo has stopped working, even though I haven’t touched anything since then.
To be precise, I’m monitoring my UART signal and I’m only getting ‘framing errors’, obviously, I’ve checked and the baud rates are the same on both sides.
Could activating the HSE clock have disrupted the operation of my UART ?
Thank you in advance for your help,
Solved! Go to Solution.
2026-03-18 5:43 AM
I'm trying but as shown in my previous post, I don't get the same thing as you in STM32 Cube Programmer
2026-03-18 5:46 AM - edited 2026-03-18 5:49 AM
@AmGo wrote:
Also, when I open SM32Cube Programmer and click on ‘Firmware Upgrade’, I get this and nothing else;
Please review the article again. I think you are not following the details.
You need to click "Open update mode" as indicated in the Step 2 shown above.
2026-03-18 5:49 AM
2026-03-18 5:50 AM - edited 2026-03-18 5:51 AM
@AmGo wrote:
This shows me the bytes transmitted by my UART and with my problem, instead of 0XBE I receive "Framing Error"
Please stick on the STLINK-MCO output problem for now.. Most probably the MCO output is not set to 5MHz as it should.
2026-03-18 5:57 AM
Sorry, I was just answering to Andrew.
I've retried the configuration and now I can see MCO Ouput. You were right, I've changed it to HSE/2 to HSE/5.
2026-03-18 5:58 AM
@AmGo wrote:
I've retried the configuration and now I can see MCO Ouput. You were right, I've changed it to HSE/2 to HSE/5.
Does it work after this change?
2026-03-18 6:01 AM
Yes, it looks like.
Thank you very much.
Can you just explain to me why you chose PLL1Q and not HSE for the FDCAN Clock Mux please ?
2026-03-18 6:06 AM
@AmGo wrote:
Yes, it looks like.
Thank you very much.
Good.
@AmGo wrote:
Can you just explain to me why you chose PLL1Q and not HSE for the FDCAN Clock Mux please ?
Better to use high frequencies for kernel clock to get better resolution for the CAN bit time so you can fine tune TSEG1/TSEG2 bit segments.