Stm32h745, freertos&LWIP is hogging SRAM1 memory.

[Ihawk.1]

LWIP is hogging memory where it didnt oughta be.

...\ld.exe: section .SRAM2 VMA [0000000030020000,0000000030031033] overlaps section .lwip_sec VMA [0000000030000000,00000000300419cf]

but in the .ld file is allocated thus

/* ethernet Modification start */

 .lwip_sec (NOLOAD) : {

  . = ABSOLUTE(0x30040000);

  *(.RxDecripSection) 

  . = ABSOLUTE(0x30040060);

  *(.TxDecripSection)

  . = ABSOLUTE(0x30040200);

  *(.RxArraySection) 

 } >RAM_D2  

 

Why does LWIP behave this way please?, what might I be doing wrong here?

It all seems to work cm7 wise(though clearly the CM4 core memory SRAM1,SRAM2 that aliases here is not available) . I have put the uncached dma buffer that was in CM7 SRAM in a block of axiram, but this is a bodge.

[Ihawk.1 · Accepted solution]

 This seems to have fixed it, though I don't understand why it is necessary to create the additional memory sub region

 "RAM3_D2 (xrw) : ORIGIN = 0x30040000, LENGTH = 32K":

/* Memories definition */

MEMORY

{

 RAM_D1 (xrw)  : ORIGIN = 0x24000000, LENGTH = 512K

 HIAXIRAM (xrw) : ORIGIN = 0x24060000, LENGTH = 128K

 FLASH (rx)  : ORIGIN = 0x08000000, LENGTH = 1024K  /* Memory is divided. Actual start is 0x08000000 and actual length is 2048K */

 DTCMRAM (xrw) : ORIGIN = 0x20000000, LENGTH = 128K

 RAM_D2 (xrw)  : ORIGIN = 0x30000000, LENGTH = 288K

 SRAM_2 (xrw)  : ORIGIN = 0x30020000, LENGTH = 128K

 RAM3_D2 (xrw) : ORIGIN = 0x30040000, LENGTH = 32K

 SRAM_1 (xrw)  : ORIGIN = 0x30000000, LENGTH = 128K

 RAM_D3 (xrw)  : ORIGIN = 0x38000000, LENGTH = 64K

 ITCMRAM (xrw) : ORIGIN = 0x00000000, LENGTH = 64K

}

/* ethernet Modification start */

 .lwip_sec (NOLOAD) : {

  . = ABSOLUTE(0x30040000);

  *(.RxDecripSection) 

  . = ABSOLUTE(0x30040060);

  *(.TxDecripSection)

  . = ABSOLUTE(0x30040200);

  *(.RxArraySection) 

 } >RAM3_D2