2025-09-09 5:34 AM
Hello,
I would like to transfer 3 linked list blocks over UART DMA. When I started HAL_MDMA_START_IT, it transmits only 16 bytes. How can I send big files back to back? Configurations are as follows:
MCU : STM32H7 series
Firmware : Last release
2025-09-29 2:07 AM
/* USER CODE BEGIN Header */
/**
******************************************************************************
* @file : main.c
* @brief : Main program body
******************************************************************************
* @attention
*
* Copyright (c) 2025 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* USER CODE END Header */
/* Includes ------------------------------------------------------------------*/
#include "main.h"
/* Private includes ----------------------------------------------------------*/
/* USER CODE BEGIN Includes */
#include <string.h>
/* USER CODE END Includes */
/* Private typedef -----------------------------------------------------------*/
/* USER CODE BEGIN PTD */
/* USER CODE END PTD */
/* Private define ------------------------------------------------------------*/
/* USER CODE BEGIN PD */
#define SRC_BUF_SIZE 32 //
#define DST_BUF_SIZE 32 //
/* USER CODE END PD */
/* Private macro -------------------------------------------------------------*/
/* USER CODE BEGIN PM */
/* USER CODE END PM */
/* Private variables ---------------------------------------------------------*/
UART_HandleTypeDef huart4;
DMA_HandleTypeDef hdma_uart4_tx;
MDMA_HandleTypeDef hmdma_mdma_channel0_sw_0;
MDMA_LinkNodeTypeDef node_mdma_channel0_sw_1;
MDMA_LinkNodeTypeDef node_mdma_channel0_sw_2;
/* USER CODE BEGIN PV */
uint8_t tx_1[32] = {0};
uint8_t tx_2[32] = {0};
uint8_t tx_3[32] = {0};
/* === Fill this with the actual TSEL value for USART4_TX from the H7 RM === */
/* USER CODE END PV */
/* Private function prototypes -----------------------------------------------*/
void SystemClock_Config(void);
static void MX_GPIO_Init(void);
static void MX_DMA_Init(void);
static void MX_MDMA_Init(void);
static void MX_UART4_Init(void);
/* USER CODE BEGIN PFP */
static void MDMA_TransferCompleteCallback(MDMA_HandleTypeDef *hmdma);
static void MDMA_TransferErrorCallback(MDMA_HandleTypeDef *hmdma);
static void MDMA_TransferBlockCompleteCallback(MDMA_HandleTypeDef *hmdma);
//static void MDMA_TransferBufferCompleteCallback(MDMA_HandleTypeDef *hmdma);
/* USER CODE END PFP */
/* Private user code ---------------------------------------------------------*/
/* USER CODE BEGIN 0 */
/* USER CODE END 0 */
/**
* @brief The application entry point.
* @retval int
*/
int main(void)
{
/* USER CODE BEGIN 1 */
memset((void*)(tx_1), 0xAA, sizeof(tx_1));
memset((void*)(tx_2), 0xBB, sizeof(tx_2));
memset((void*)(tx_3), 0xCC, sizeof(tx_3));
/* USER CODE END 1 */
/* MCU Configuration--------------------------------------------------------*/
/* Reset of all peripherals, Initializes the Flash interface and the Systick. */
HAL_Init();
/* USER CODE BEGIN Init */
/* USER CODE END Init */
/* Configure the system clock */
SystemClock_Config();
/* USER CODE BEGIN SysInit */
/* USER CODE END SysInit */
/* Initialize all configured peripherals */
MX_GPIO_Init();
MX_DMA_Init();
MX_MDMA_Init();
MX_UART4_Init();
/* USER CODE BEGIN 2 */
//HAL_DMA_RegisterCallback(&hdma_uart4_tx, HAL_DMA_XFER_CPLT_CB_ID, DMA_TransferCompleteCallback);
HAL_MDMA_RegisterCallback(&hmdma_mdma_channel0_sw_0, HAL_MDMA_XFER_CPLT_CB_ID, MDMA_TransferCompleteCallback);
HAL_MDMA_RegisterCallback(&hmdma_mdma_channel0_sw_0, HAL_MDMA_XFER_BLOCKCPLT_CB_ID, MDMA_TransferBlockCompleteCallback);
HAL_MDMA_RegisterCallback(&hmdma_mdma_channel0_sw_0, HAL_MDMA_XFER_ERROR_CB_ID, MDMA_TransferErrorCallback);
// dcache_clean_region(tx50, 16 * 3);
if (HAL_MDMA_Start_IT(&hmdma_mdma_channel0_sw_0, (uint32_t)tx_1, (uint32_t)&huart4.Instance->TDR, 32, 1) != HAL_OK)
{
__NOP();
}
/* USER CODE END 2 */
/* Infinite loop */
/* USER CODE BEGIN WHILE */
while (1)
{
__NOP();
/* USER CODE END WHILE */
/* USER CODE BEGIN 3 */
}
/* USER CODE END 3 */
}
/**
* @brief System Clock Configuration
* @retval None
*/
void SystemClock_Config(void)
{
RCC_OscInitTypeDef RCC_OscInitStruct = {0};
RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
/** Supply configuration update enable
*/
HAL_PWREx_ConfigSupply(PWR_LDO_SUPPLY);
/** Configure the main internal regulator output voltage
*/
__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE0);
while(!__HAL_PWR_GET_FLAG(PWR_FLAG_VOSRDY)) {}
/** Initializes the RCC Oscillators according to the specified parameters
* in the RCC_OscInitTypeDef structure.
*/
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
RCC_OscInitStruct.HSIState = RCC_HSI_DIV1;
RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
RCC_OscInitStruct.PLL.PLLM = 4;
RCC_OscInitStruct.PLL.PLLN = 60;
RCC_OscInitStruct.PLL.PLLP = 2;
RCC_OscInitStruct.PLL.PLLQ = 2;
RCC_OscInitStruct.PLL.PLLR = 2;
RCC_OscInitStruct.PLL.PLLRGE = RCC_PLL1VCIRANGE_3;
RCC_OscInitStruct.PLL.PLLVCOSEL = RCC_PLL1VCOWIDE;
RCC_OscInitStruct.PLL.PLLFRACN = 0;
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
{
Error_Handler();
}
/** Initializes the CPU, AHB and APB buses clocks
*/
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
|RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2
|RCC_CLOCKTYPE_D3PCLK1|RCC_CLOCKTYPE_D1PCLK1;
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
RCC_ClkInitStruct.SYSCLKDivider = RCC_SYSCLK_DIV1;
RCC_ClkInitStruct.AHBCLKDivider = RCC_HCLK_DIV2;
RCC_ClkInitStruct.APB3CLKDivider = RCC_APB3_DIV2;
RCC_ClkInitStruct.APB1CLKDivider = RCC_APB1_DIV2;
RCC_ClkInitStruct.APB2CLKDivider = RCC_APB2_DIV2;
RCC_ClkInitStruct.APB4CLKDivider = RCC_APB4_DIV2;
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK)
{
Error_Handler();
}
}
/**
* @brief UART4 Initialization Function
* @PAram None
* @retval None
*/
static void MX_UART4_Init(void)
{
/* USER CODE BEGIN UART4_Init 0 */
/* USER CODE END UART4_Init 0 */
/* USER CODE BEGIN UART4_Init 1 */
/* USER CODE END UART4_Init 1 */
huart4.Instance = UART4;
huart4.Init.BaudRate = 115200;
huart4.Init.WordLength = UART_WORDLENGTH_8B;
huart4.Init.StopBits = UART_STOPBITS_1;
huart4.Init.Parity = UART_PARITY_NONE;
huart4.Init.Mode = UART_MODE_TX;
huart4.Init.HwFlowCtl = UART_HWCONTROL_NONE;
huart4.Init.OverSampling = UART_OVERSAMPLING_16;
huart4.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_ENABLE;
huart4.Init.ClockPrescaler = UART_PRESCALER_DIV2;
huart4.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT;
if (HAL_UART_Init(&huart4) != HAL_OK)
{
Error_Handler();
}
if (HAL_UARTEx_SetTxFifoThreshold(&huart4, UART_TXFIFO_THRESHOLD_8_8) != HAL_OK)
{
Error_Handler();
}
if (HAL_UARTEx_SetRxFifoThreshold(&huart4, UART_RXFIFO_THRESHOLD_8_8) != HAL_OK)
{
Error_Handler();
}
if (HAL_UARTEx_EnableFifoMode(&huart4) != HAL_OK)
{
Error_Handler();
}
/* USER CODE BEGIN UART4_Init 2 */
/* USER CODE END UART4_Init 2 */
}
/**
* Enable DMA controller clock
*/
static void MX_DMA_Init(void)
{
/* DMA controller clock enable */
__HAL_RCC_DMA1_CLK_ENABLE();
/* DMA interrupt init */
/* DMA1_Stream0_IRQn interrupt configuration */
HAL_NVIC_SetPriority(DMA1_Stream0_IRQn, 0, 0);
HAL_NVIC_EnableIRQ(DMA1_Stream0_IRQn);
}
/**
* Enable MDMA controller clock
* Configure MDMA for global transfers
* hmdma_mdma_channel0_sw_0
* node_mdma_channel0_sw_1
* node_mdma_channel0_sw_2
*/
static void MX_MDMA_Init(void)
{
/* MDMA controller clock enable */
__HAL_RCC_MDMA_CLK_ENABLE();
/* Local variables */
MDMA_LinkNodeConfTypeDef nodeConfig;
/* Configure MDMA channel MDMA_Channel0 */
/* Configure MDMA request hmdma_mdma_channel0_sw_0 on MDMA_Channel0 */
hmdma_mdma_channel0_sw_0.Instance = MDMA_Channel0;
hmdma_mdma_channel0_sw_0.Init.Request = MDMA_REQUEST_SW;
hmdma_mdma_channel0_sw_0.Init.TransferTriggerMode = MDMA_BLOCK_TRANSFER;
hmdma_mdma_channel0_sw_0.Init.Priority = MDMA_PRIORITY_VERY_HIGH;
hmdma_mdma_channel0_sw_0.Init.Endianness = MDMA_LITTLE_ENDIANNESS_PRESERVE;
hmdma_mdma_channel0_sw_0.Init.SourceInc = MDMA_SRC_INC_BYTE;
hmdma_mdma_channel0_sw_0.Init.DestinationInc = MDMA_DEST_INC_DISABLE;
hmdma_mdma_channel0_sw_0.Init.SourceDataSize = MDMA_SRC_DATASIZE_BYTE;
hmdma_mdma_channel0_sw_0.Init.DestDataSize = MDMA_DEST_DATASIZE_BYTE;
hmdma_mdma_channel0_sw_0.Init.DataAlignment = MDMA_DATAALIGN_PACKENABLE;
hmdma_mdma_channel0_sw_0.Init.BufferTransferLength = 32;
hmdma_mdma_channel0_sw_0.Init.SourceBurst = MDMA_SOURCE_BURST_SINGLE;
hmdma_mdma_channel0_sw_0.Init.DestBurst = MDMA_DEST_BURST_SINGLE;
hmdma_mdma_channel0_sw_0.Init.SourceBlockAddressOffset = 0;
hmdma_mdma_channel0_sw_0.Init.DestBlockAddressOffset = 0;
if (HAL_MDMA_Init(&hmdma_mdma_channel0_sw_0) != HAL_OK)
{
Error_Handler();
}
/* Initialize MDMA link node according to specified parameters */
nodeConfig.Init.Request = MDMA_REQUEST_SW;
nodeConfig.Init.TransferTriggerMode = MDMA_BLOCK_TRANSFER;
nodeConfig.Init.Priority = MDMA_PRIORITY_VERY_HIGH;
nodeConfig.Init.Endianness = MDMA_LITTLE_ENDIANNESS_PRESERVE;
nodeConfig.Init.SourceInc = MDMA_SRC_INC_BYTE;
nodeConfig.Init.DestinationInc = MDMA_DEST_INC_DISABLE;
nodeConfig.Init.SourceDataSize = MDMA_SRC_DATASIZE_BYTE;
nodeConfig.Init.DestDataSize = MDMA_DEST_DATASIZE_BYTE;
nodeConfig.Init.DataAlignment = MDMA_DATAALIGN_PACKENABLE;
nodeConfig.Init.BufferTransferLength = 32;
nodeConfig.Init.SourceBurst = MDMA_SOURCE_BURST_SINGLE;
nodeConfig.Init.DestBurst = MDMA_DEST_BURST_SINGLE;
nodeConfig.Init.SourceBlockAddressOffset = 0;
nodeConfig.Init.DestBlockAddressOffset = 0;
nodeConfig.PostRequestMaskAddress = 0;
nodeConfig.PostRequestMaskData = 0;
nodeConfig.SrcAddress = (uint32_t)tx_2;
nodeConfig.DstAddress = (uint32_t)&huart4.Instance->TDR;
nodeConfig.BlockDataLength = 32;
nodeConfig.BlockCount = 1;
if (HAL_MDMA_LinkedList_CreateNode(&node_mdma_channel0_sw_1, &nodeConfig) != HAL_OK)
{
Error_Handler();
}
/* USER CODE BEGIN mdma_channel0_sw_1 */
/* USER CODE END mdma_channel0_sw_1 */
/* Connect a node to the linked list */
if (HAL_MDMA_LinkedList_AddNode(&hmdma_mdma_channel0_sw_0, &node_mdma_channel0_sw_1, 0) != HAL_OK)
{
Error_Handler();
}
/* Initialize MDMA link node according to specified parameters */
nodeConfig.Init.Request = MDMA_REQUEST_SW;
nodeConfig.Init.TransferTriggerMode = MDMA_BLOCK_TRANSFER;
nodeConfig.Init.Priority = MDMA_PRIORITY_VERY_HIGH;
nodeConfig.Init.Endianness = MDMA_LITTLE_ENDIANNESS_PRESERVE;
nodeConfig.Init.SourceInc = MDMA_SRC_INC_BYTE;
nodeConfig.Init.DestinationInc = MDMA_DEST_INC_DISABLE;
nodeConfig.Init.SourceDataSize = MDMA_SRC_DATASIZE_BYTE;
nodeConfig.Init.DestDataSize = MDMA_DEST_DATASIZE_BYTE;
nodeConfig.Init.DataAlignment = MDMA_DATAALIGN_PACKENABLE;
nodeConfig.Init.BufferTransferLength = 32;
nodeConfig.Init.SourceBurst = MDMA_SOURCE_BURST_SINGLE;
nodeConfig.Init.DestBurst = MDMA_DEST_BURST_SINGLE;
nodeConfig.Init.SourceBlockAddressOffset = 0;
nodeConfig.Init.DestBlockAddressOffset = 0;
nodeConfig.PostRequestMaskAddress = 0;
nodeConfig.PostRequestMaskData = 0;
nodeConfig.SrcAddress = (uint32_t)tx_3;
nodeConfig.DstAddress = (uint32_t)&huart4.Instance->TDR;
nodeConfig.BlockDataLength = 32;
nodeConfig.BlockCount = 1;
if (HAL_MDMA_LinkedList_CreateNode(&node_mdma_channel0_sw_2, &nodeConfig) != HAL_OK)
{
Error_Handler();
}
/* USER CODE BEGIN mdma_channel0_sw_2 */
/* USER CODE END mdma_channel0_sw_2 */
/* Connect a node to the linked list */
if (HAL_MDMA_LinkedList_AddNode(&hmdma_mdma_channel0_sw_0, &node_mdma_channel0_sw_2, 0) != HAL_OK)
{
Error_Handler();
}
/* MDMA interrupt initialization */
/* MDMA_IRQn interrupt configuration */
HAL_NVIC_SetPriority(MDMA_IRQn, 0, 0);
HAL_NVIC_EnableIRQ(MDMA_IRQn);
}
/**
* @brief GPIO Initialization Function
* @PAram None
* @retval None
*/
static void MX_GPIO_Init(void)
{
/* USER CODE BEGIN MX_GPIO_Init_1 */
/* USER CODE END MX_GPIO_Init_1 */
/* GPIO Ports Clock Enable */
__HAL_RCC_GPIOH_CLK_ENABLE();
__HAL_RCC_GPIOA_CLK_ENABLE();
/* USER CODE BEGIN MX_GPIO_Init_2 */
/* USER CODE END MX_GPIO_Init_2 */
}
/* USER CODE BEGIN 4 */
/**
* @brief Tx Transfer completed callback.
* @PAram huart UART handle.
* @retval None
*/
void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart)
{
__NOP(); // To check if it hits here !
}
static void MDMA_TransferCompleteCallback(MDMA_HandleTypeDef *hmdma)
{
__NOP(); // To check if it hits here !
}
static void MDMA_TransferErrorCallback(MDMA_HandleTypeDef *hmdma)
{
__NOP(); // To check if it hits here !
}
static void MDMA_TransferBlockCompleteCallback(MDMA_HandleTypeDef *hmdma)
{
__NOP(); // To check if it hits here !
}
/* USER CODE END 4 */
/**
* @brief This function is executed in case of error occurrence.
* @retval None
*/
void Error_Handler(void)
{
/* USER CODE BEGIN Error_Handler_Debug */
/* User can add his own implementation to report the HAL error return state */
__disable_irq();
while (1)
{
}
/* USER CODE END Error_Handler_Debug */
}
#ifdef USE_FULL_ASSERT
/**
* @brief Reports the name of the source file and the source line number
* where the assert_param error has occurred.
* @PAram file: pointer to the source file name
* @PAram line: assert_param error line source number
* @retval None
*/
void assert_failed(uint8_t *file, uint32_t line)
{
/* USER CODE BEGIN 6 */
/* User can add his own implementation to report the file name and line number,
ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
/* USER CODE END 6 */
}
#endif /* USE_FULL_ASSERT */
2025-09-29 2:27 AM
The code I shared at the beginning that I took it from this cube example that you shared. Link is below
2025-09-29 7:22 AM
Hello @farukisiker
Unfortunately, you cannot not use UART with MDMA in linked list mode. There not MDMA Request for UART peripheral.
Please see the document below for more details:
STM32H7-System-Master direct memory access controller (MDMA)
In the driver also you can see that there is no MDMA request for UART.
/** @defgroup MDMA_Request_selection MDMA Request selection
* @brief MDMA_Request_selection
* @{
*/
#define MDMA_REQUEST_DMA1_Stream0_TC ((uint32_t)0x00000000U) /*!< MDMA HW request is DMA1 Stream 0 Transfer Complete Flag */
#define MDMA_REQUEST_DMA1_Stream1_TC ((uint32_t)0x00000001U) /*!< MDMA HW request is DMA1 Stream 1 Transfer Complete Flag */
#define MDMA_REQUEST_DMA1_Stream2_TC ((uint32_t)0x00000002U) /*!< MDMA HW request is DMA1 Stream 2 Transfer Complete Flag */
#define MDMA_REQUEST_DMA1_Stream3_TC ((uint32_t)0x00000003U) /*!< MDMA HW request is DMA1 Stream 3 Transfer Complete Flag */
#define MDMA_REQUEST_DMA1_Stream4_TC ((uint32_t)0x00000004U) /*!< MDMA HW request is DMA1 Stream 4 Transfer Complete Flag */
#define MDMA_REQUEST_DMA1_Stream5_TC ((uint32_t)0x00000005U) /*!< MDMA HW request is DMA1 Stream 5 Transfer Complete Flag */
#define MDMA_REQUEST_DMA1_Stream6_TC ((uint32_t)0x00000006U) /*!< MDMA HW request is DMA1 Stream 6 Transfer Complete Flag */
#define MDMA_REQUEST_DMA1_Stream7_TC ((uint32_t)0x00000007U) /*!< MDMA HW request is DMA1 Stream 7 Transfer Complete Flag */
#define MDMA_REQUEST_DMA2_Stream0_TC ((uint32_t)0x00000008U) /*!< MDMA HW request is DMA2 Stream 0 Transfer Complete Flag */
#define MDMA_REQUEST_DMA2_Stream1_TC ((uint32_t)0x00000009U) /*!< MDMA HW request is DMA2 Stream 1 Transfer Complete Flag */
#define MDMA_REQUEST_DMA2_Stream2_TC ((uint32_t)0x0000000AU) /*!< MDMA HW request is DMA2 Stream 2 Transfer Complete Flag */
#define MDMA_REQUEST_DMA2_Stream3_TC ((uint32_t)0x0000000BU) /*!< MDMA HW request is DMA2 Stream 3 Transfer Complete Flag */
#define MDMA_REQUEST_DMA2_Stream4_TC ((uint32_t)0x0000000CU) /*!< MDMA HW request is DMA2 Stream 4 Transfer Complete Flag */
#define MDMA_REQUEST_DMA2_Stream5_TC ((uint32_t)0x0000000DU) /*!< MDMA HW request is DMA2 Stream 5 Transfer Complete Flag */
#define MDMA_REQUEST_DMA2_Stream6_TC ((uint32_t)0x0000000EU) /*!< MDMA HW request is DMA2 Stream 6 Transfer Complete Flag */
#define MDMA_REQUEST_DMA2_Stream7_TC ((uint32_t)0x0000000FU) /*!< MDMA HW request is DMA2 Stream 7 Transfer Complete Flag */
#if defined (LTDC)
#define MDMA_REQUEST_LTDC_LINE_IT ((uint32_t)0x00000010U) /*!< MDMA HW request is LTDC Line interrupt Flag */
#endif /* LTDC */
#if defined (JPEG)
#define MDMA_REQUEST_JPEG_INFIFO_TH ((uint32_t)0x00000011U) /*!< MDMA HW request is JPEG Input FIFO threshold Flag */
#define MDMA_REQUEST_JPEG_INFIFO_NF ((uint32_t)0x00000012U) /*!< MDMA HW request is JPEG Input FIFO not full Flag */
#define MDMA_REQUEST_JPEG_OUTFIFO_TH ((uint32_t)0x00000013U) /*!< MDMA HW request is JPEG Output FIFO threshold Flag */
#define MDMA_REQUEST_JPEG_OUTFIFO_NE ((uint32_t)0x00000014U) /*!< MDMA HW request is JPEG Output FIFO not empty Flag */
#define MDMA_REQUEST_JPEG_END_CONVERSION ((uint32_t)0x00000015U) /*!< MDMA HW request is JPEG End of conversion Flag */
#endif /* JPEG */
#if defined (OCTOSPI1)
#define MDMA_REQUEST_OCTOSPI1_FIFO_TH ((uint32_t)0x00000016U) /*!< MDMA HW request is OCTOSPI1 FIFO threshold Flag */
#define MDMA_REQUEST_OCTOSPI1_TC ((uint32_t)0x00000017U) /*!< MDMA HW request is OCTOSPI1 Transfer complete Flag */
#endif /* OCTOSPI1 */
#if defined (QUADSPI)
#define MDMA_REQUEST_QUADSPI_FIFO_TH ((uint32_t)0x00000016U) /*!< MDMA HW request is QSPI FIFO threshold Flag */
#define MDMA_REQUEST_QUADSPI_TC ((uint32_t)0x00000017U) /*!< MDMA HW request is QSPI Transfer complete Flag */
#endif /* QUADSPI */
#define MDMA_REQUEST_DMA2D_CLUT_TC ((uint32_t)0x00000018U) /*!< MDMA HW request is DMA2D CLUT Transfer Complete Flag */
#define MDMA_REQUEST_DMA2D_TC ((uint32_t)0x00000019U) /*!< MDMA HW request is DMA2D Transfer Complete Flag */
#define MDMA_REQUEST_DMA2D_TW ((uint32_t)0x0000001AU) /*!< MDMA HW request is DMA2D Transfer Watermark Flag */
#if defined (DSI)
#define MDMA_REQUEST_DSI_TEARING_EFFECT ((uint32_t)0x0000001BU) /*!< MDMA HW request is DSI Tearing Effect Flag */
#define MDMA_REQUEST_DSI_END_REFRESH ((uint32_t)0x0000001CU) /*!< MDMA HW request is DSI End of refresh Flag */
#endif /* DSI */
#define MDMA_REQUEST_SDMMC1_END_DATA ((uint32_t)0x0000001DU) /*!< MDMA HW request is SDMMC1 End of Data Flag */
#define MDMA_REQUEST_SDMMC1_DMA_ENDBUFFER ((uint32_t)0x0000001EU) /*!< MDMA HW request is SDMMC1 Internal DMA buffer End Flag */
#define MDMA_REQUEST_SDMMC1_COMMAND_END ((uint32_t)0x0000001FU) /*!< MDMA HW request is SDMMC1 Command End Flag */
#if defined (OCTOSPI2)
#define MDMA_REQUEST_OCTOSPI2_FIFO_TH ((uint32_t)0x00000020U) /*!< MDMA HW request is OCTOSPI2 FIFO threshold Flag */
#define MDMA_REQUEST_OCTOSPI2_TC ((uint32_t)0x00000021U) /*!< MDMA HW request is OCTOSPI2 Transfer complete Flag */
#endif /* OCTOSPI2 */
#define MDMA_REQUEST_SW ((uint32_t)0x40000000U) /*!< MDMA SW request */
2025-09-30 12:24 AM
1- If it does not support, why it sends some bytes when I start mdma interrupt?
if (HAL_MDMA_Start_IT(&hmdma_mdma_channel0_sw_0, (uint32_t)tx_1, (uint32_t)&huart4.Instance->TDR, 32, 1) != HAL_OK)
2-I uploaded an image about how I configured UART4 dma request. According to request mapping, I am supposed to able to connect dma 1 stream 0 to mdma list. If so, how can I do it?
2025-09-30 2:06 AM
Hello @farukisiker
DMA1 should be first configured to transfer data from the USART peripheral to a buffer in memory. Once the DMA transfer is complete, MDMA is hardware-triggered to take over. MDMA then moves the data from the DMA-accessible buffer to another memory region.