STM32F415RG hid usb sample does not enumerate ...

[rishi2]

Posted on August 09, 2012 at 09:56

I am trying to use STM32F415RG OTG HS core in FS device mode but was not able to successfully enumerate it. I am using stm32_f105-07_f2_f4_usb-host-

device_lib(2.1) HID sample.

I have some confusions like :

1. I assume STM32 F415RG have only HS core as stated on Page 12 of datasheet.

    Then why we have OTG_FS_DM and DP on PA11 and PA12 on pins 44 and 45 on page 52?

   But anyways i have connected OTG_HS_DM and DP to PB 14 and PB15 on our test board. And connected  VBUS to PB13. I hope this should work , right?

2. As soon as i connect USB connector windows enumerates it as unknown device. Now i am not sure it's my custom hardware or library issue? I am using 

HID sample with USE_USB_OTG_HS,USE_EMBEDDED_PHY switches expecting to use FS mode on HS core. I tried disabling DMA, dedicated EP1 and low power 

management without any help.

3. I am using crystal of 8 MHz on our test board, and i have noticed on development boards its 25MHz, this can be my issue?

Please help me or give me some directions to look into. Thanks #otg #hs-in-fs-mode #stm32f4

[Tesla DeLorean]

Posted on August 09, 2012 at 13:35

1) It has an internal FS interface at PA11,12, whereas the HS interface connects on other pins to an EXTERNAL PHY.

2) VID/PID not tied to any INF file? 3) You'd better ensure ALL settings of clocks, PLL, and HSE_VALUE are consistent with the physical hardware you have placed on the board. Review system_stm32f4xx.c

[rishi2]

Posted on August 10, 2012 at 09:47

Thanks,

1. Right I am sorry i was referring to data sheet Rev2 which says STM32F415RG only has the HS core, but in Rev3 it says it has HS and FS cores. But i am trying to use internal FS physical on HS core. in usb_conf.h i have 

USE_USB_OTG_HS and USE_EMBEDDED_PHY.

2. No i don't think so as i have changed the values of PID, VID few times but it didn't helped.3.My test board has crystal of 8MHz and USB D- and D+ is connected on PB14 and PB15 , and i am using PB13 for VBUS sensing. I have changed PLL_M and HSE_VALUE to 8.I was wondering in sample in HS config tries to use DMA, dedicated EP1 and low power management. I have disabled all these switches. usb_conf.h looks like :#define USE_USB_OTG_HS#define USE_EMBEDDED_PHY#define USB_OTG_HS_CORE#ifdef USB_OTG_HS_CORE #define RX_FIFO_HS_SIZE                          512 #define TX0_FIFO_HS_SIZE                         128 #define TX1_FIFO_HS_SIZE                         372 #define TX2_FIFO_HS_SIZE                          0 #define TX3_FIFO_HS_SIZE                          0 #define TX4_FIFO_HS_SIZE                          0 #define TX5_FIFO_HS_SIZE                          0 //#define USB_OTG_HS_INTERNAL_DMA_ENABLED  //#define USB_OTG_HS_DEDICATED_EP1_ENABLED //#define USB_OTG_HS_LOW_PWR_MGMT_SUPPORT#endif#define VBUS_SENSING_ENABLED#define USE_DEVICE_MODE

....

void USB_OTG_BSP_Init(USB_OTG_CORE_HANDLE *pdev){  GPIO_InitTypeDef GPIO_InitStructure;    //  EXTI_InitTypeDef EXTI_InitStructure;//  NVIC_InitTypeDef NVIC_InitStructure;    RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOB , ENABLE);    GPIO_InitStructure.GPIO_Pin = GPIO_Pin_14 |                                 GPIO_Pin_15;    GPIO_InitStructure.GPIO_Speed = GPIO_Speed_100MHz;  GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;  GPIO_Init(GPIOB, &GPIO_InitStructure);      GPIO_PinAFConfig(GPIOB,GPIO_PinSource14,GPIO_AF_OTG2_FS) ;   GPIO_PinAFConfig(GPIOB,GPIO_PinSource15,GPIO_AF_OTG2_FS) ;    GPIO_InitStructure.GPIO_Pin = GPIO_Pin_13;  GPIO_InitStructure.GPIO_Speed = GPIO_Speed_100MHz;  GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN;  GPIO_InitStructure.GPIO_OType = GPIO_OType_OD;  GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL ;  GPIO_Init(GPIOB, &GPIO_InitStructure);      RCC_AHB1PeriphClockCmd( RCC_AHB1Periph_OTG_HS, ENABLE);    

[Tesla DeLorean]

Posted on August 10, 2012 at 16:20

I don't even know if that is a valid combination.

The USB library also connects PB12 to GPIO_AF_OTG2_FS, when USE_ULPI_PHY is NOT defined. You might want to review the schematics for the STM324xG, and the Olimex H407, the latter implements 2x FS ports without an HS PHY. This is definitely an area you'd want to discuss with you FAE, or ST support contact.

[rishi2]

Posted on August 10, 2012 at 18:18

Thanks, Now i am thinking i should try it with FS core only ie PA11,PA12, i am already struggling with it from 4-5 days now. And i can leave ID pin right?. I only have to connect DP,DM and VBUS to PA9.

I only used HS because of Rev 2 datasheet :( Anyways thank you so much for your help.

[flyer31]

Posted on August 10, 2012 at 18:22

In the standard lib, USB HS Port will work only in HiSpeedMode (you can try with a development board containing USB HS interface, e. g. the Keil board), and USB FS Port will work only in FullSpeed Mode.

USB HS Port in FullSpeed Mode does not work - there is quite a bit of mixup in the code between the defines USE_USB_OTG_FS/HS and USB_OTG_FS/HS_CORE ... (see some earlier post from me). I got it run, but only I have got enough experience in their USB lib so that I could check all occurrencies of these defines in the code and correct them where necessary (and only for my application, USB device mode, WinUsb application - but I cannot give out the code, sorry). It would be nice if you would force ST to publish the lib in such a state, that USB FS mode works also for the USB HS port - it think this usually should be job of ST development team.

[rishi2]

Posted on August 10, 2012 at 19:17

So you were able to make it work,thats great!  I am not sure how i can push ST to improve and fix there USB libraries, but I am sure ST team have never tested HS core in FS mode with there USB samples, and you are right there is lot of confusion with these defines.

Now either i have to redo my board for FS connections :( (which is bad and costly) or may be somebody from ST is kind enough to help me out here. Thanks

[Tesla DeLorean]

Posted on August 10, 2012 at 20:29

All the FS examples, and STM32F4-Discovery use the FS pins, and easily demonstrable, I'm not sure why you chose to implement them on the HS pins without a PHY. Perhaps there is some magic around the 405/415, we have a custom design using the pin identical 205 using the FS pins, which share lineage with prior STM32 platforms.

I'm seriously looking at picking up one of the Olimex H407 boards to get a better handle on dual USB/OTG

[Alex Yang]

Posted on August 10, 2012 at 20:38

Just saw this thread. I think the fact that the computer enumerated your board as unknown device in the first place, might be no more than an indication that one of the USB data lines had been pulled up. A simple 1.5K resistor pulling D+ up to 3.3V could get you the same result, and the chip doesn't neccessarily need to do anything more than providing the logic high. If that's the case, then it's possible that the HS core never worked with your hardware configuration at all, and you couldn't have fixed anything by changing VID and PID.

This reply may not help much in your case since you've found the right datasheet, but it might help with USB debugging in future. If you set a breakpoint right after the line of code responsible for ''soft attaching'' USB and run your firmware, then you would get this ''unknown device'' bubble on your PC, because the USB root hub has timed out after issuing a bus reset.

[rishi2]

Posted on August 10, 2012 at 20:43

As i said clive, i had STM32 F4 Rev2 data sheet which i downloaded probably few months back when i started working on this project. Rev2 data sheet clearly said STM32F415RG do not have FS core, but you can use HS core with internal FS PHY.

Thats why i used PB14 and PB Thanks ________________ Attachments : Screen_shot_2012-08-11_at_12.10.55_AM.png : https://st--c.eu10.content.force.com/sfc/dist/version/download/?oid=00Db0000000YtG6&ids=0680X000006HtY4&d=%2Fa%2F0X0000000aRc%2F0PlmngARnqNX1L_by.gXxEi4TgGn9TaFGflwHK1LuJc&asPdf=false