STM32f107 and 25MHz MCO out to Ethernet PHY LAN8742A

[arjun raj]

Posted on February 13, 2018 at 11:14

Hi,

I am planning to use a 25MHz crystal as HSE Xtal for STM32f107 and route the same 25MHz Clock as MCO out to drive the ethernet PHY Chip -LAN8742A.

From LAN8742A, 50MHz RMIIREFCLK is fed back to stm32f107 EMAC.

I want to know if there are any issues in doing so.

In Evaluation board, NUCLEO F207zG, they have connected seperate 25MHz crystal to the PHY Chip.

Looking for a quick response 

Thanks and regards

Arjun P Raj

#25mhz-crystal #lan8742a #ethernet #ethernet-phy

[T J]

Posted on February 13, 2018 at 13:50

Hi,

I have a similar setup on my F767,  I serve the 25MHz directly to the processor and the LAN8720 chip

I am using the MII mode.to reduce heat.

[arjun raj]

Posted on February 13, 2018 at 14:19

Hi TJ, 

I believe here you have used a XTAL oscillator (connected to only pin32 of uC).

I was thinking of using lower cost Xtal - FA-238 25.0000MB-C3 (between OSC_In and OSC_Out)

and use MCO out of 25MHz from uC to the PHY Chip. Is this approach acceptable.

What is the reason you selected an oscillator instead of a Xtal.

Also where have you placed the oscillator on PCB, is it near to uC or PHY Chip.

Regards

Arjun P Raj

[T J]

Posted on February 13, 2018 at 14:39

My first board,  your suggestion, didnt work, but I was very green then, never done it before.

Yes of course, use the crystal and reroute through MCO and use a resistor in series with the LAN8742A chip

I didnt know what to do.

I considered this a better approach to guarantee the two 25MHz signals are in phase exactly.

Dont worry about costs too much... worry about it working then try to reduce the costs...

the Lan8720a is 45mm from the 100R !

the suggestion in the forums was to place the resistor as far away from the driver as possible,

but I didnt want a low impedance 25MHz running around, now I still have 25mhz running around but its at a much higher impedance.

I tried carefully to separate the tracks, you can spend hours cleaning tracks.

  but as the design draws to completion, there is no room,

All the tracks got shoved together, but works beautifully in 100MHz full duplex MII mode.

[arjun raj]

Posted on February 13, 2018 at 15:28

Hi,

In your first board were you using the same 25MHz clock as the ethernet MII Ref Clock.

Here in my board I am taking 25MHz as the input of PHY Chip and from PHY Chip, 50MHz reference clock for RMII is generated and fed to the ETH_RMII_REF_CLK pin of stm32.

So the phase change issue, will that be applicable in my case.

And now if I am using oscillator and routing the 25MHz to the PHY and uC, i will have to use a via and run the 25MHz track in bottom layer beneath the microcontroller. Is it acceptable.

Thanks and Regards

Arjun P Raj

[T J]

Posted on February 13, 2018 at 21:26

I am not sure what was wrong of the first board, I suggest you can check other designs,

do you need to use the RMII ? the chips get warmer running twice as fast..

[arjun raj]

Posted on February 14, 2018 at 10:43

Yes TJ,

Since we are using a 64 pin package for micro, RMII is better and LAN8742A supports only RMII.

BTW did you use LAN8720A? even that supports only RMII ryt?

Were you using the below mentioned approach with external 25MHz clock oscilator and 50MHz REFCLKO output from PHY?

[T J]

Posted on February 15, 2018 at 02:25

No, I believe in RMII mode you need the 50MHz at double the rate to fill the 4 data bit buffers at 25MHz rate.