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stm32f1 fw package 1.70 SPI bug

VLuky
Associate II

Im using stm32f103RB on nucleo64 board, to read SPI sensor with half duplex SPI master mode.

SPI blocking recive function do not disable SPI properly, it should disable it and then finish recive one more time, as user manual RM0008 specify(25.3.8), but function only disable SPI. Next recive will be broken with partially read byte in DR.

Current function code is

HAL_StatusTypeDef HAL_SPI_Receive(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size, uint32_t Timeout)
 
{
 
...
 
 /* Check the end of the transaction */
 
 if((hspi->Init.Mode == SPI_MODE_MASTER)&&((hspi->Init.Direction == SPI_DIRECTION_1LINE)||(hspi->Init.Direction == SPI_DIRECTION_2LINES_RXONLY)))
 
 {
 
  /* Disable SPI peripheral */
 
  __HAL_SPI_DISABLE(hspi);
 
 }
 
 
 
...
 
 
 
}

Ah that comment, but no one care, now one!

It should be like that

volatile uint8_t ttt;

if((hspi->Init.Mode == SPI_MODE_MASTER)&&((hspi->Init.Direction == SPI_DIRECTION_1LINE)||(hspi->Init.Direction == SPI_DIRECTION_2LINES_RXONLY)))
 
 {
 
 //
 
  /* Disable SPI peripheral */
 
  __HAL_SPI_DISABLE(hspi);
 
 
 
//fix according to 25.3.8
 
  while(!__HAL_SPI_GET_FLAG(hspi, SPI_FLAG_RXNE)){};
 
  ttt = *(__IO uint8_t *)&hspi->Instance->DR;
 
 }

Im very disappointed to see such bug in year 2019.

***

That bug lead to very confusing behavior of SPI.

For example.

Shifted recived data

https://i.imgur.com/3rsLKaN.png

DR is partially filed with data which get ther because SPI wasn disabled imideatly or wated for RXNE and DR cleared after disabling.

Another example, looked like totaly wrong data, but it all same source - SPI internals was not reset after last recive(disable/enable do not do it, awesome premature optimization thank you very much). So blocking recive return control even befor requred amoint of data is recived and clock is active.

https://i.imgur.com/JHtG5Rs.png

4 REPLIES 4
VLuky
Associate II

That forum engine is also awful.

Yes, but we've had worse in recent memory

Tips, Buy me a coffee, or three.. PayPal Venmo
Up vote any posts that you find helpful, it shows what's working..
S.Ma
Principal

Well, I try to only use full duplex mode of the SPI whch the number of SCK clocks is under SW control instead of time control.

If it's 3 wire, I short MISO with MOSI outside, if it's mono directional, just activate only one pin.

VLuky
Associate II

Thank you, i will give it a try.