STM32CubeME V5.3.0 with STM32Cube_FW_G0_V1.3.0 not generating expected code in MX_ADC1_Init()

[DBroo.1]

Using STM32G070CB with IAR​. I have the following ADC Channels configured in Cube: 0-9, 11 and 13. I'm using 16x Oversampling, Sequence Not Fully Configured and DMA and wanting to interrupt after the sequence of 12 channels has been saved to DMA. Cube is generating the code below.

Question 1: On Channel_0 and Channel_3, although the setting is correct, why is sConfig.Rank being set to ADC_RANK_CHANNEL_NUMBER; when CHSELRMOD=0?

Question 2: On Channel_2, why is sConfig.Rank being set to 1, which is incorrect and not consistent with CHSELRMOD=0?

Question 3: When I run the code, CHSELR Register = 0x0081 when I am expecting 0x2BFF? CFGR1 and CFGR2 appear to be configured correctly, 0x000184C1 and 0x2000000D, respectively.

void MX_ADC1_Init(void)

{

 ADC_ChannelConfTypeDef sConfig = {0};

 /** Configure the global features of the ADC (Clock, Resolution, Data Alignment and number of conversion)

 */

 hadc1.Instance = ADC1;

 hadc1.Init.ClockPrescaler = ADC_CLOCK_ASYNC_DIV32;

 hadc1.Init.Resolution = ADC_RESOLUTION_12B;

 hadc1.Init.DataAlign = ADC_DATAALIGN_RIGHT;

 hadc1.Init.ScanConvMode = ADC_SCAN_SEQ_FIXED;

 hadc1.Init.EOCSelection = ADC_EOC_SEQ_CONV;

 hadc1.Init.LowPowerAutoWait = DISABLE;

 hadc1.Init.LowPowerAutoPowerOff = ENABLE;

 hadc1.Init.ContinuousConvMode = DISABLE;

 hadc1.Init.DiscontinuousConvMode = ENABLE;

 hadc1.Init.ExternalTrigConv = ADC_EXTERNALTRIG_T3_TRGO;

 hadc1.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_RISING;

 hadc1.Init.DMAContinuousRequests = DISABLE;

 hadc1.Init.Overrun = ADC_OVR_DATA_PRESERVED;

 hadc1.Init.SamplingTimeCommon1 = ADC_SAMPLETIME_1CYCLE_5;

 hadc1.Init.OversamplingMode = ENABLE;

 hadc1.Init.Oversampling.Ratio = ADC_OVERSAMPLING_RATIO_16;

 hadc1.Init.Oversampling.RightBitShift = ADC_RIGHTBITSHIFT_NONE;

 hadc1.Init.Oversampling.TriggeredMode = ADC_TRIGGEREDMODE_SINGLE_TRIGGER;

 hadc1.Init.TriggerFrequencyMode = ADC_TRIGGER_FREQ_LOW;

 if (HAL_ADC_Init(&hadc1) != HAL_OK)

 {

   Error_Handler();

 }

 /** Configure Regular Channel

 */

 sConfig.Channel = ADC_CHANNEL_0;

 sConfig.Rank = ADC_RANK_CHANNEL_NUMBER;

 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)

 {

   Error_Handler();

 }

 /** Configure Regular Channel

 */

 sConfig.Channel = ADC_CHANNEL_1;

 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)

 {

   Error_Handler();

 }

 /** Configure Regular Channel

 */

 sConfig.Channel = ADC_CHANNEL_2;

 sConfig.Rank = 1;

 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)

 {

   Error_Handler();

 }

 /** Configure Regular Channel

 */

 sConfig.Channel = ADC_CHANNEL_3;

 sConfig.Rank = ADC_RANK_CHANNEL_NUMBER;

 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)

 {

   Error_Handler();

 }

 /** Configure Regular Channel

 */

 sConfig.Channel = ADC_CHANNEL_4;

 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)

 {

   Error_Handler();

 }

 /** Configure Regular Channel

 */

 sConfig.Channel = ADC_CHANNEL_5;

 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)

 {

   Error_Handler();

 }

 /** Configure Regular Channel

 */

 sConfig.Channel = ADC_CHANNEL_6;

 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)

 {

   Error_Handler();

 }

 /** Configure Regular Channel

 */

 sConfig.Channel = ADC_CHANNEL_7;

 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)

 {

   Error_Handler();

 }

 /** Configure Regular Channel

 */

 sConfig.Channel = ADC_CHANNEL_8;

 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)

 {

   Error_Handler();

 }

 /** Configure Regular Channel

 */

 sConfig.Channel = ADC_CHANNEL_9;

 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)

 {

   Error_Handler();

 }

 /** Configure Regular Channel

 */

 sConfig.Channel = ADC_CHANNEL_11;

 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)

 {

   Error_Handler();

 }

 /** Configure Regular Channel

 */

 sConfig.Channel = ADC_CHANNEL_16;

 if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)

 {

   Error_Handler();

 }

}

[DBroo.1]

​Update: It appears the issues mentioned above are not causing me any problems. I now have the ADC interrupting upon EOS with DMA and trigger is TIM3 at 200ms. But HAL_ADC_ConvCpltCallback() is called only once. The REF Manual says "When hardware trigger is selected in single mode (CONT=0 and EXTEN = 01), ADSTART is not cleared by hardware when the EOS flag is set. This avoids the need for software having to set the ADSTART bit again and ensures the next trigger event is not missed."

However, ADSTART is cleared prior to running code in the callback. I quickly tried restarting inside the callback via HAL_ADC_Start_DMA(), but it returns with HAL_BUSY error.

What am I missing?

[DBroo.1]

​Any thoughts? Need some help.