QSPI Data line always high after HAL initialization on B-L462E-CELL1 devkit

[FDanf.1]

I'm trying to use the QSPI interface in Indirect mode to read, write, and erase to an MT25Q Flash chip that is found on the B-L462E-CELL1 development kit.

Using the HAL QSPI initilization included in the STM32CubeL4 package, I am finding the interface misconfigured. The IO3 data line idles high, while all others idle low.

Additionally, it looks like the QSPI peripheral is using all 4 IO lines for instructions, addresses, and data even though I am specifying 1_LINE in each QSPI command, as evidenced by the number of cycles

Are there any known issues with this HAL package?

[Tesla DeLorean · Accepted solution]

D3 would normally be HOLD# or RESET#, Micron says this should be pulled high with devices in single or dual mode. On some of their BGA parts RESET# is pulled high via an internal pull up, and can be left unconnected.

The memory device should only care about the state of the lines when it's CS# is asserted. The subset of pins involved depends on the mode the device is in.

Not sure of the code or expectations on the B-L462E-CELL1 board. The BSP normally walks the chip into the desired mode of operation, XIP usage would end that with a Memory Mapping configuration.