2019-05-28 02:17 AM
2019-05-28 06:01 AM
DMA interactions are typically managed on the HT (Half Transfer) and TC (Transfer Complete) interrupts or equivalent callbacks. You can move the data about, or light off ne transfers in the TC case.
2019-05-28 08:59 AM
Which STM32? Daisy Chain SPI of how many devices?
2019-05-28 11:32 PM
stm32f401re .. 25 devices
2019-05-29 08:28 AM
13 devices at 12MHz through board connectors (no wires) works ok.
MISO and MOSI are delayed by logic in each chip while SCK line goes to all slave devices, limiting the max frequency.
At lower frequency you can have more devices. At least you got a reference point.
All device will emulate a long shift register, say 64 bytes. This will be a buffer which SPI DMA will cycle through for both TX and RX.
Use NSS EXTI rise and fall edge to reset DMA to buffer beginning and analyse the 64 bytes at NSS rise edge.
If first device is master, make the SPI ring:
MISO =[Master]=> MOSI => [MISO =Slave0=> MISO] => [MOSI=Slave1=>MISO] ===> Loop back to master's MISO input.
This will implement daisy chain with 25 devices, 64 bytes per device.
A round transaction will transfer 25x64 bytes = 1600 bytes @ 6 MHz = 300 us? (should run as interrupt).
Only Master has DMA RX end of transfer interrupt.
All slaves only get interrupt on NSS EXTI rise/fall edge
Master should pause a bit after toggle NSS for slave EXTI interrupt to have all kicked in.