Can not configure the HAL_SPI_Receive() funciton to provide 8 clock cycles to the CLK pin.

[N ORhan]

Hi everyone.

I'm working on NUCLEO-F303RE board to acquire mouse sensor displacament data to the MCU to be processed. Mouse sensor has an SPI interface which is 2 wires (CLK and SDIO). So i configured my SPI3 peripheral accordingly on CUBEMX and it works for x-displacement reading. But when i try to read y-displacement after reading x-displacement, i can not get y data. I think this is due to 16 clock cycles which HAL_SPI_Receive() function provides. Displacement data are 8-bits but this function provides 16 clock cycles. So the last 8 clocks could be some commands (read-write) on the mouse sensor side with reference to the SDIO pin's state. So how can this function be configured to have 8-clock cycles to have a synchronised SPI communication? Or do you have another solutions for this issue?

Thank you for your answers.

#[STM32CubeHAL/LL]​ 

[S.Ma]

This SPI has fifo.

If you want to send 8 bits, you have to write 8 bit to the data register. If you write 16 bit, it will be queued as 2x8 bit then pushed out. Chech thw hal header file for 8 bit pointer write function.

[N ORhan]

Thanks @KIC8462852 EPIC204278916 but i dont have any problem when writing to the mouse sensor's register, instead the problem occurs when only receiving. There is two functions Transmit and Receivie whiche are only transmitting and receiving respectively. I only want to get 8 clock cycles (no data in transmitter data register) to receive my data from the data register which i previously transmit the address as a read command.

[alister]

Possibly observed the same problem on an STM32F03, finding the high-level HAL couldn't operate quickly enough to generate only 8 clocks, and coded the following using its low-level macros.

The high-level HAL is for rapid development not high performance. If a reader knows a method to develop it at the high-level HAL please share.

  /* Receive 1 byte. */
  /* Configured for 8-bit, the SPI peripheral's SCL free-runs in multiples of
  8 and the number of accesses on the SPI bus is determined by its number
  of SCLs. So interrupts must be masked about enabling SPI receive to prevent
  an interrupt's delay from inadvertently increasing the number of accesses. */
#if defined(__IAR_SYSTEMS_ICC__)
  __disable_interrupt();
#else
  __disable_irq();
#endif
 
  /* Configure communication direction: 1Line */
  SPI_1LINE_RX((&TARGET_SPI_RF));
 
  /* Enable SPI peripheral */
  __HAL_SPI_ENABLE((&TARGET_SPI_RF));   // The SPI peripheral starts clocking on this.
 
  /* Disable SPI peripheral */
  __HAL_SPI_DISABLE((&TARGET_SPI_RF));
 
#if defined(__IAR_SYSTEMS_ICC__)
  __enable_interrupt();
#else
  __enable_irq();
#endif
 
  /* Wait for the data to finish shifting in. */
  while (!(__HAL_SPI_GET_FLAG((&TARGET_SPI_RF), SPI_FLAG_RXNE)));
 
  dat = *(__IO uint8_t *)&TARGET_SPI_RF.Instance->DR;
 
  /* Control the BSY flag */
  while (TARGET_SPI_RF.Instance->SR & SPI_SR_BSY);
 
  /* Make sure the RX FIFO is empty, just in case there were too many SCLs. */
  while ((TARGET_SPI_RF.Instance->SR & SPI_SR_FRLVL) != SPI_FRLVL_EMPTY)
  {
    __IO uint8_t tmpreg = *(__IO uint8_t *)&TARGET_SPI_RF.Instance->DR;
    /* To avoid GCC warning */
    UNUSED(tmpreg);
  }
 

[N ORhan]

Than you so much @alister​, i changed the HAL_SPI_Receive() function as you mention to disable SPI right after enabling in the function. This time i'm enabling and disabling SPI at every receive action but it works fine.