Can anyone explain why there is a 1ms delay here
/**
* @brief Disables the MAC transmission.
* @param heth pointer to a ETH_HandleTypeDef structure that contains
* the configuration information for ETHERNET module
* @retval None
*/
static void ETH_MACTransmissionDisable(ETH_HandleTypeDef *heth)
{
__IO uint32_t tmpreg1 = 0U;
/* Disable the MAC transmission */
(heth->Instance)->MACCR &= ~ETH_MACCR_TE;
/* Wait until the write operation will be taken into account:
at least four TX_CLK/RX_CLK clock cycles */
tmpreg1 = (heth->Instance)->MACCR;
ETH_Delay(ETH_REG_WRITE_DELAY);
(heth->Instance)->MACCR = tmpreg1;
}
I am trying to power down the LAN8742 PHY, ahead of putting the CPU in Standby. I have tried the obvious like
ETH->MACCR = 0x00008000;
but the above code snippet shows one has to then read back MACCR and write it back in after a long delay. That delay above is actually 1ms, which is way too long for my purpose.
I can see there is some sort of "USART" link along which this stuff gets sent. The 8742 data sheet describes the registers. Its SMI timing shows a max clock of ~2MHz.
