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Thanks, but the speeds I mentioned for SWV is the core clock speed as entered into the debug configuration in STM32CubeIDE:
I have tried limiting (down to 200kHz) and not limiting the SWO clock, but it doesn't change the result. Here are my numbers showing the SWO clock:
SWV 16MHz / 8 = 2000kHz, SYSCLK 16Mhz = logging works
SWV 16MHz / 8 = 2000kHz, SYSCLK 25Mhz = logs gibberish (expected)
SWV 25MHz / 13 = 1920kHz, SYSCLK 25Mhz = logs nothing at all
SWV 48MHz / 16 = 2000kHz, SYSCLK 48Mhz = logs nothing at all
With SYSCLK 48Mhz, the SWO clock is the same 2000kHz as it is with SYSCLK 16Mhz, yet it does not work.
It makes sense about the start bit, though I still don't understand why the only configuration that works is SWV 16MHz / 8 = 2000kHz. It seems if I set any other frequency, I get nothing.
Had the same issue until tonight, experience C++ dev but newbie (4days) to STM32.
Anyhow, I managed to get the trace to run properly at 32MHZ thus far, after a cpl dozen failed attempts.
The Clock setting function: set the Clock speed to 32MHZ in the main example:
TESTED on STM32F411CE
VERY IMPORTANT: Be sure to test your clock speed settings: I figured I had the PLL_P value wrong !
And the ST documentation is not very clear on this value : I was after enforcing value 2 to have prescaler 2:
e.g. HSE to 25MHZ on STM32F411 then PLL_M prescaler set to 25 and then PLL_P to 2
Result 25/25 * (clock speed set value e.g. 192 MHZ) / 2 (PLL_P) == 96 MHZ clock speed.
However I figured I set, PLL_P = 2 , which caused the clock speed to be divided by factor 4 e.g. 192/4 instead of 2.
Instead again, it is counter intuitive but the PLL_P value needs set to binary b00 in order to obtain the desired prescaler to value == decimal 2.
So I was suprised that my attempts kept failing, after debugging, adding the SystemCoreClock to a WATCH while debbuging, I figured it out, then simply setting the CPU speed, as below in Keil IDE Trace config settings, did the trick, so far tested 32 and 48 MHZ successfully.
Note: I am not even using an official STM32 Vlink but the Chinese cheap clone modified to expose the SWO pin. And well it works pretty well. See my post :
https://community.st.com/t5/stm32cubeide-mcus/debugging-with-itm-not-working-with-swv-in-stm32cubeide/td-p/172503
The correct clock speed code with correct PLL_P b00 value.
void SystemClock_Config(void) {
// Enable HSE (if using external crystal) 25MHZ on F411
RCC->CR |= RCC_CR_HSEON;
while (!(RCC->CR & RCC_CR_HSERDY));
RCC -> APB1ENR |= RCC_APB1ENR_PWREN;
PWR ->CR |= PWR_CR_VOS;
// Configure Flash Latency (example for high speed)
FLASH -> ACR |= FLASH_ACR_ICEN | FLASH_ACR_PRFTEN | FLASH_ACR_DCEN |FLASH_ACR_LATENCY_3WS;
// Configure PLL (example values, replace with your calculations)
//Put PLL_M = 25, PLL_P = 0, PLL_N = 192, PLL_M = 25 and PLL_Q = 4 (Main PLL prescaler)
//Select PLL source as HSE oscillator by setting the RCC_PLLCFGR_PLLSRC bit.
//formula https://kunalsalvi63.medium.com/bare-metal-rcc-setup-for-stm32f411cex-23d2ef2d706d
// Input HSE freq => 25MHZ for F411 / PLL_M x PLL_N / PLL_P ==
// 25/25 *192 / 2 == 96 MHZ clock
// Then ensure to set AHB, APB1 and APB2. APB1 MAx 50 MHZ ! , APB2 MAX =96MHZ
//Put PLL_M = 25, PLL_P = 0 (to get / 2), PLL_N = 192, PLL_M = 25 and PLL_Q = 4.
RCC->PLLCFGR = (25U << RCC_PLLCFGR_PLLM_Pos) | // PLLM = 25 MHZ for HSE oscillo
(64U << RCC_PLLCFGR_PLLN_Pos) | // PLLN = 192 MHZ
(0U << RCC_PLLCFGR_PLLP_Pos) | // PLLP = 2 (0b00)
(4U << RCC_PLLCFGR_PLLQ_Pos) | // PLLQ = 4 so 192/4 e.g.
RCC_PLLCFGR_PLLSRC_HSE; // PLL Source is HSE
// Enable PLL
RCC->CR |= RCC_CR_PLLON;
while (!(RCC->CR & RCC_CR_PLLRDY));
// Configure AHB, APB1, APB2 prescalers
RCC->CFGR |= RCC_CFGR_HPRE_DIV1 | // AHB prescaler = 1 => ,max AHB == 96
RCC_CFGR_PPRE1_DIV2 | // APB1 prescaler = 2 max APB1 50MHZ
RCC_CFGR_PPRE2_DIV1; // APB2 prescaler = 1 max APB2 96MHZ
// 25mhz fixed PLL max 100 AHB96 APB1 50 APB2 96/
// HSE >>> PLL >>> SYSCLCK >>> AHB/APB1/APB2
// Select PLL as system clock source
RCC->CFGR |= RCC_CFGR_SW_PLL;
while ((RCC->CFGR & RCC_CFGR_SWS) != RCC_CFGR_SWS_PLL);
// Update SystemCoreClock variable (part of CMSIS)
SystemCoreClockUpdate();
}int main()
{
printf("Hello, STM32!\n");
printf("Hello, STM32!\n");
printf("clock speed %d, STM32!\n", SystemCoreClock);
SystemClock_Config();
printf("clock speed %d, STM32!\n", SystemCoreClock);
USART2_Init();
while(1){
printf("clock speed %d, STM32!\n", SystemCoreClock);
USART_write('!');//print !
USART_write('\r');USART_write('\n'); //new line and return cursor to start of the line
delay(1000);
}
}Keil IDE Debug trace config. I found that getting the clock option e.g. using the system clock, or SWO clock and then selecting a manual set/forced prescaler value or leaving it to "set to max" is what made the difference between scrambled characters and then clear output.
As below test done with 32MHZ
Keil IDE Trace debug config
Note: The prescaler for SWO is calculated by Keil IDE and is e.g. 3x for 32MHZ, was only 2x for 16MHZ, and for 64MHZ, just tested to work is set to 4x.
So to answer to S.C ST Employee: This is very important to enter the correct CPU clock speed and making sure one way or another than your IDE or whatever debug setup takes it into account and sets the right prescaler value for the SWO channel!
Update: TESTED to work at 48MHZ too, will keep testing see what happens, as below success
TESTED at 64MHZ again works 1st hand if right debug trace setting in Keil IDE.
TESTED at 96MHZ again works 1st hand if right debug trace setting in Keil IDE. Which is 4MHZ away from the max 100MHZ for the STM32F411.
Again I cannot insist enough on the fact that you need to check that your debug IDE/setup is enforcing the correct SWO channel prescaler in order to limit the SWO freq to under 16MHZ. In this case thanks to letting KEil IDE setting it automatically to 8x, when at 96MHZ then it works perfectly !
Note you can set it manually, if your IDE does not set it automatically and just make sure to use under 16MHZ, I tested 10MHZ, 12MHZ and 8MHZ thus far to work perfectly.
