SPI on STM32G031

[Archadious]

I'm attempting to configure SPI1 on an STM32G031.   However I must be missing something because there is no data being output.   I am trying setup SPI to transmit 16 bits at a time.  Any suggestions would be appreciated.   I'm running the uC at 64Mhz.

// Configure PA4 as the SPI select pin
//-----------------------------------------------------------------------------
void spi::nss( ) {

  GPIOA->MODER &= ~(GPIO_MODER_MODE4);  // clear the mode bits for PA4
  GPIOA->MODER |= GPIO_MODER_MODE4_0;  // Set PA4 as output mode
  GPIOA->OTYPER &= ~(GPIO_OTYPER_OT4);  // Push-pull output on PA4
  GPIOA->OSPEEDR |= GPIO_OSPEEDR_OSPEED4;  // Set PA4 for High Speed
  GPIOA->PUPDR &= ~(GPIO_PUPDR_PUPD4);  // No pull-up/pull-down on PA4

};  // end css


// Configure pin PA5 as the SPI clock pin
//-----------------------------------------------------------------------------
void spi::sck( ) {

  GPIOA->MODER &= ~(GPIO_MODER_MODE5);  // clear the mode bits for PA5
  GPIOA->MODER |= GPIO_MODER_MODE5_1;  // Set PA5 to Alternate Function Mode
  GPIOA->OTYPER &= ~(GPIO_OTYPER_OT5);  // Push-pull output on PA5
  GPIOA->OSPEEDR |= GPIO_OSPEEDR_OSPEED5;  // Set speed of PA5 to Very High
  GPIOA->AFR[ 0 ] &= ~(GPIO_AFRL_AFSEL5);  // Set PA5 Alt Function to SPI1_SCK

};  // end clock


// Configure pin PA7 as the SPI Master-Out-Slave-In pin
//-----------------------------------------------------------------------------
void spi::mosi( ) {

  GPIOA->MODER &= ~(GPIO_MODER_MODE7);  // clear the mode bits for PA5
  GPIOA->MODER |= GPIO_MODER_MODE7_1;  // Set PA7 to Alternate Function Mode
  GPIOA->OTYPER &= ~(GPIO_OTYPER_OT7);  // Push-pull output on PA5
  GPIOA->OSPEEDR |= GPIO_OSPEEDR_OSPEED7;  // Set speed of PA5 to Very High
  GPIOA->AFR[ 0 ] &= ~(GPIO_AFRL_AFSEL7);  // Set PA7 Alt Function to SPI1_SCK

};  // end mosi


// Write 16 bits to SPI
//-----------------------------------------------------------------------------
void spi::write16( uint16_t data ) {

  printf( "spi::write16 data: %lx\r\n", data );

  select();  // NSS pin to low

  while( !( SPI1->SR & SPI_SR_TXE ) ) __NOP();
  *(volatile uint16_t*)&SPI1->DR = data;
  while( SPI1->SR & SPI_SR_BSY ) __NOP();

  deselect();  // NSS pin to high

};  // end write16


//-----------------------------------------------------------------------------
spi::spi( ) {

  printf( "spi::spi\r\n" );

  // Enable the RCC clocks for both GPIOA and SPI1
  RCC->IOPENR |= RCC_IOPENR_GPIOAEN;  // enable the GPIOA clock
  RCC->APBENR2 |= RCC_APBENR2_SPI1EN;  // enable the SPI1 clock

  // GPIO settings
  nss();
  sck();
  mosi();

  // Configure SPI1
  SPI1->CR1 &= SPI_CR1_SPE;  // disable SPI1

  SPI1->CR1 = 0;  // clear out the cr1 register
  SPI1->CR1 |= SPI_CR1_MSTR;  // Master mode for SPI1

  SPI1->CR1 |= SPI_CR1_SSM | SPI_CR1_MSTR | SPI_CR1_SSI;
  SPI1->CR1 &= ~( SPI_CR1_CPOL | SPI_CR1_CPHA );
  SPI1->CR1 &= ~SPI_CR1_LSBFIRST;  // MSB first

  SPI1->CR1 &= ~SPI_CR1_BR;    // Clear BR bits
  SPI1->CR1 |= ( SPI_CR1_BR_2 | SPI_CR1_BR_0 );  // 101 -> /64


  SPI1->CR2 = 0;  // clear cr2 register
  SPI1->CR2 |= SPI_CR2_DS;  // Set 16-bit data
  SPI1->CR2 &= ~SPI_CR2_FRXTH;  // RXNE set at 16-bits

  SPI1->CR1 |= SPI_CR1_SPE;  // enable SPI1

};  // end spi