2025-06-23 6:35 AM
Hello, I have the STM32N6570-DK kit. I can compile, upload and debug by following the instructions on the kit. I designed my own board but I can't debug. I'm reviewing all the possibilities and I noticed some problems. I couldn't find any explanation.
https://community.st.com/t5/stm32-mcus/stm32n6-boot-rom-explained/ta-p/763648
@B.Montanari 's article says H(High) VDDIO. However, in the DK schematics and pcb, the left side is vddio and the right side is gnd. Also, the Boot1 pin is pulled to the right to load software on the DK. So Boot0 becomes important. What's the problem? Are the documents wrong? Also, on the board I made, I can load software when boot1 is connected to vddio. But on the DK, it allows me to load software when boot1 is GND. What's the explanation?
Solved! Go to Solution.
2025-06-25 1:40 AM
Hi @Okeskin
This is because on this SPDT DIP switch with common input, the closing direction of the internal contact is reversed compared to the position.
When SW1 or SW2 are in Right position (H), the contact is between 1 & 2. The BOOTn pin = VDDIO.
When SW1 or SW2 are in Left position (L), the contact is between 1 & 3. The BOOTn pin = GND.
Best regards,
Romain
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2025-06-24 10:19 AM
Hi @Okeskin
Pins BOOT0 and BOOT1 define the STM32N6 boot sequence.
This is what you shared with Table 32 in RM0486.
Note that BOOT1 has priority over BOOT0.
On your STM32N6570-DK, as explained in the article:
There are no errors in the documentation or in the schematics. What are the error message whan you are trying to debug your application?
Share your board diagram or measure the voltage levels you have on BOOT0 and BOOT1 as I explain to confirm is you are applying the correct DEV_Boot conditions.
Best regards,
Romain,
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2025-06-24 11:05 AM
@Okeskin wrote:I designed my own board but I can't debug.
What do you mean by that?
What are you using to debug?
Where, exactly, does it fail?
If the problem is in the debugger connection to the board, see:
https://community.st.com/t5/stm32-mcus/how-to-solve-debugger-connection-issues/ta-p/49693
2025-06-24 11:56 PM
Hi @RomainR.
If you examine the MB1939 project files and the pictures I shared below, you can see that pulling the switches to the right means pulling them to gnd. I can already work on DK without any problems. The problem is that in DK hardware, pulling to the right should be High, but it is actually Low. Please examine MB1939.
BR.
Onur
2025-06-24 11:59 PM
Hi@Andrew Neil ,
N6 is not a processor that can be debugged using classical methods. I was able to debug it with some changes.
BR.
Onur.
2025-06-25 1:40 AM
Hi @Okeskin
This is because on this SPDT DIP switch with common input, the closing direction of the internal contact is reversed compared to the position.
When SW1 or SW2 are in Right position (H), the contact is between 1 & 2. The BOOTn pin = VDDIO.
When SW1 or SW2 are in Left position (L), the contact is between 1 & 3. The BOOTn pin = GND.
Best regards,
Romain
To give better visibility on the answered topics, please click on Accept as Solution on the reply which solved your issue or answered your question.
2025-06-25 2:54 AM
Hi @RomainR.
I didn't think that switch was working in reverse. Thank you for the information. It's more clear now.
Thanks,
Onur