STM32L011F3U6TR mcu boot0/PB9 pin has internal pull-up/pull-down resistor feature?

[jason239955_st]

Please help to find out whether STM32L011F3U6TR mcu boot0/PB9 pin has internal pull-up/pull-down resistor feature. There is no mention that boot0 pin is special in this respect, ie no internal pull-up/pull-down resistor.  On my board, unable to bring this pin high even though boot0/PB9

pin is configured with pull-up resistor. Any workaround fix if it doesn’t have.

[Peter BENSCH]

BOOT0 itself doesn't have an internal pull resistor connected, but please note: L011 belongs to category 1, which shares BOOT0 with PB9 (RM0377, table 1). PB9 is a GPIO (well, in this case only a GPI) and therefore also provides the programmable pull resistors.

[edited: PB9 is obviously not equipped with pull resistors, sorry for the mistake]

Regards

/Peter

[TDK]

Note that pullup/pulldown resistors will not be active in reset, and therefore can't be used as a means to control the BOOT0 pin during powerup.

[jason239955_st]

That is my question. I am not specifically referring to boot0 pin. Just that in stm32l011 it is shared with PB9 and supposed to be the same features as other GPIOs but may be slightly different specification. However, in pull up resistor case, it doesn’t work. So my guess is ‘it doesn’t have one’. I would like to get a confirmation from ST and request them to update the datasheet as such to avoid application design mistake (like mine) for others.

[TDK]

Duplicate question (no answer there either, however):

https://community.st.com/s/question/0D50X0000ArTP94/boot0-pin-on-stm32l011-has-internal-pull-resistor

The OP of the linked post mentions behavior consistent with there being no pullup/pulldown available on that pin.

[Igor Cesko · Accepted solution]

Hi jason239955_st,

I am confirming (from ST side) that BOOT0/PB9 pin has no pull-up/down feature. This pin is input pin only - it only senses the BOOT0 pin state. The BOOT0/PB9 pin is characterized in datasheet (in pinout table) with "I/O structure" "B" - this means I/O structure of this pin is as boot pin and not as standard GPIO pin (with IO structure TC, TT, FT, ... ). "B" structure is different - designed for BOOT0 pin (see datasheet characteristics for BOOT0 pin) - higher voltage, higher leakage, ... .

We will try to improve the reference manual description - mention here that pull-up/down feature is not available for this pin in STM32L011/21 device. To be clear in future. For newer STM32 devices: The BOOT0 -GPIO sharing is designed differently and pin can work as true GPIO (input/output, ... all GPIO features) - like 2 pins together (BOOT0 and GPIO) in parallel.

Regards

Igor

[jason239955_st]

Hi @Igor Cesko​

Just for further understand:

• I/O structure B: Yes, just checked the datasheet, it does mention that boot0/PB9 is of I/O structure B – dedicated boot0 pin.
• for this, there is no further information about structure B.
• it says structure B is a dedicated boot0 pin which is not exactly true as it is a shared GPIO pin not really a dedicated boot0 pin.
• ref manual: ‘mention here that pull-up/down feature is not available for this pin in STM32L011/21 device’
• this is already in the ref manual or in future?
• can’t find in ref manual anywhere mention about this.
• If it is for future ref manual update, it will be good. Thanks.

[Igor Cesko]

Hi jason239955_st,

The correction about the pull-up on BOOT0/PB9 is not mentioned today in documentation - we will improve this by adding this information into documentation (reference manual or datasheet). I think now that it will be better to add this information into datasheet - because user usually study this document in more details. Next future datasheet revision will mention that pull-up/down feature is not available on BOOT0/PB9 pin.

Regards

Igor