Hello community, I am using the STM32H757 development board along with the DSI-to-HDMI adapter board and would like to generate a resolution of 1080p via an HDMI interface. The adapter board supports this resolution at a refresh rate of 30 Hz. However, I have only been able to achieve a maximum resolution of 1600 x 900 at a refresh rate of 25 Hz and a pixel clock of 40 MHz. I am aware that the DSI bandwidth is limited to 1 Gbit/s per lane, but with two lanes, this shouldn't be an issue, right? Perhaps someone could also explain to me the relationship between the Pixel Clock (To LTDC), Lane Clock (To DSI lane byte), and Escape Clock (To DSI txclkesc). Thank you to everyone who can assist me.
