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On STM32H7 if VBAT is not connected, but VDD is always present. Does NRST maintain backup registers?

DanF
Associate II

I have an STM32H7 on a custom board. We do not have VBAT connected to anything. We do have a battery always connected to VDD. When I reset the MCU using the NRST pin it seems like the backup domain (registers and RAM) are not maintained. Is this expected? If I connect my power source to both VDD and VBAT will that correct the problem?

The manual does say " If no external battery is used in the application, it is recommended to connect VBAT externally to VDD through a 100 nF external ceramic capacitor.".

I plan to do that, but I want to know if the problem I'm experiencing is due to this and will be solved.

Thanks,

Dan

1 ACCEPTED SOLUTION

Accepted Solutions
Peter BENSCH
ST Employee

RM0433, 6.4.4 also contains a warning:

Warning: During tRSTTEMPO (temporization at VDD startup) or after a PDR is detected, the power switch between VBAT and VDD remains connected to VBAT.

During the a startup phase, if VDD is established in less than tRSTTEMPO (see the datasheet for the value of tRSTTEMPO) and VDD > VBAT + 0.6 V, a current may be injected into VBAT through an internal diode connected between VDD and the power switch (VBAT).

If the power supply/battery connected to the VBAT pin cannot support this current injection, it is strongly recommended to connect an external low-drop diode between this power supply and the VBAT pin.

It is therefore recommended to connect VBAT to VDD so that the backup domain is safely supplied.

Regards

/Peter

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6 REPLIES 6
Peter BENSCH
ST Employee

The backup domain is supplied by VBAT. If you do not supply VBAT, the backup domain will forget everything during the RESET.

Regards

/Peter

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DanF
Associate II

Thanks for the quick response. Just to completely confirm... it looks like the backup domain is connected to Vdd when Vdd has power. (See attached figure 23 from page 265 of STM32H7 RM 0433 rev 7.) In my device I always have power to Vdd even when I assert the NRST line.

So, even in that situation, the backup domain loses power?

Thanks for confirming!

Dan

Peter BENSCH
ST Employee

RM0433, 6.4.4 also contains a warning:

Warning: During tRSTTEMPO (temporization at VDD startup) or after a PDR is detected, the power switch between VBAT and VDD remains connected to VBAT.

During the a startup phase, if VDD is established in less than tRSTTEMPO (see the datasheet for the value of tRSTTEMPO) and VDD > VBAT + 0.6 V, a current may be injected into VBAT through an internal diode connected between VDD and the power switch (VBAT).

If the power supply/battery connected to the VBAT pin cannot support this current injection, it is strongly recommended to connect an external low-drop diode between this power supply and the VBAT pin.

It is therefore recommended to connect VBAT to VDD so that the backup domain is safely supplied.

Regards

/Peter

In order to give better visibility on the answered topics, please click on Accept as Solution on the reply which solved your issue or answered your question.

On Nucleo-H743/753 indeed the backup RAM is preserved after software reset and reset button, while the power is connected.

DanF
Associate II

Thanks Peter/Pavel.

After some testing, even if VBat is not connected, the backup registers/RAM are preserved through a reset using the NRST pin. (We're not using a Nucleo board, so VBat is not connected).

We will connect VBat to Vdd to handle the issue that Peter mentioned which seems like it could happen and lead to instability.

Appreciate everyone's help!

Peter BENSCH
ST Employee

When your question is answered, please mark this topic as answered by choosing Select as Best for the preferred answer, as also explained here. This will help other users find that answer faster.

Regards

/Peter

In order to give better visibility on the answered topics, please click on Accept as Solution on the reply which solved your issue or answered your question.