Internal RTC clock lag issue

[Freedom_Neo]

I am using below componnet tools

MCU: STM32H7B3IIT6

IDE: STM32CubeIDE Version: 1.9.0

CRYSTAL: RT3215-32.768-12.5-TR ( 32.7680KHZ 12.5PF)

I work with internal RTC. I will use for clock. But RTC clock behinds real clock. While the product is running, the lag increases even more. But when the product is turned off, when it is turned on after 2 days, the rest continues as it was 2 days ago. In other words, I am experiencing the lagging event while the product is running. When the product is turned off, there is no lag.

[waclawek.jan]

This may be the "half-a-second-per-reset" problem; don't call HAL_RTC_Init() unconditionally after reset.

https://community.st.com/s/question/0D50X00009XkgBWSAZ/stm32-rtc-loses-one-second-after-each-reset

If it's not this problem, then review the RTC circuit; any high-frequency power track next to it; grounding arrangement; and try to change the LSE drive level.

 https://community.st.com/s/question/0D53W00000pUA9NSAW/stm32f373-rtc-is-accurate-with-vbat-but-not-when-power-is-on

JW

[Freedom_Neo]

>>This may be the "half-a-second-per-reset" problem; don't call HAL_RTC_Init() unconditionally after reset.

I already did it this way. My problem occurs when the device is always on. While the device is running, the clock falls behind.

But if the device is turned off and turned on after a while, the clock does not go back when it is turned off.

>>If it's not this problem, then review the RTC circuit; any high-frequency power track next to it; grounding arrangement; and try to change the LSE drive level.

Hardware layout below

 

[waclawek.jan]

> Hardware layout below

Often the problem is ground. A solid ground layer is not a solution, if there are high currents flowing through it; rather, a separate ground connection to VSS pin closest to crystal pins is better.

...and try to change the LSE drive level.

JW

[Freedom_Neo]

Hi @Community member​ The purpose of the pins next to the oscillator pins is as follows. There are no pins that draw high current.

[waclawek.jan]

...and try to change the LSE drive level.

JW

[Freedom_Neo]

Hi @Community member​ I tryed 4 options. But RTC clock lag resume. I see at 5 minutes about RTC clock late 2-3 seconds

[waclawek.jan]

I have no other ideas. You still can use an external 32.768kHz oscillator.

JW

[Peter BENSCH · Accepted solution]

If you can't get a clean working LSE clock with the crystal and your layout, you should indeed feed in an external 32.768kHz clock (bypass mode) as JW wrote.

As you wrote, you have no additional shift of the RTC during the off-time, which speaks for interfering signals during the on-time.

If you are successful with the external clock, you can start improving the layout, because I have a strong suspicion that at least the very dense and unshielded VSYNC signal is coupling in and causing you these problems.

AN2867 shows some sample layouts that you can use as a guide. For example, you can take a closer look at the GND routing in section 7.2, paying special attention to the separation of the GND area under the crystal and its passive components, as well as the connection of this separated GND area to the GND pins next to the OSC pins (in the example of fig 14, this is an STM32 in a UFBGA176 package).

Regards

/Peter

[Freedom_Neo]

I have another question. STM32H7B3I-DK - Discovery kit use NX3215SA-32.768KHZ-EXS00A-MU00525 Crystal. Crystal Load Capacitance is 6, 9, 12.5 pF but STM32H7B3I-DK - Discovery kit use 1.5pF. Why it use different load capacitance.