void SPI_Config(void){
GPIO_InitTypeDef GPIO_InitStructure;
GPIO_InitStructure.GPIO_Pin =SPI1_SCK| SPI1_MISO| SPI1_MOSI|SPI1_NSS|SPI1_RESET;
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_10MHz;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP; //Chan hoat dong trong 1 chuc nang thay the nhu I2C, SPI
GPIO_Init(SPI1_GPIO, &GPIO_InitStructure);
GPIO_WriteBit(SPI1_GPIO, SPI1_NSS, Bit_SET);
//SPI Config
SPI_InitTypeDef SPI_InitStruct;
SPI_InitStruct.SPI_Mode = SPI_Mode_Master; //Chon kieu thiet bi master hay slave
SPI_InitStruct.SPI_Direction = SPI_Direction_2Lines_FullDuplex; //Quy dinh kieu truyen Song cong, Ban song cong, don cong
SPI_InitStruct.SPI_BaudRatePrescaler = SPI_BaudRatePrescaler_64; //Chia tan so xung Clock. Tan so mac dinh 72MHZ
SPI_InitStruct.SPI_CPOL = SPI_CPOL_Low; // Khi k cap xung thi SCK = 0
SPI_InitStruct.SPI_CPHA = SPI_CPHA_1Edge; //Tin hieu truyen di o canh xung dau tien
SPI_InitStruct.SPI_DataSize = SPI_DataSize_8b;//Truyen 8bit hoac 16bit
SPI_InitStruct.SPI_FirstBit = SPI_FirstBit_MSB; // Truyen bit trong so cao truoc
SPI_InitStruct.SPI_CRCPolynomial = 7 ;//Cau hinh Checksum, neu Data8bit thi de 7, neu 16bit thi de 15, co the de mac dinh
SPI_InitStruct.SPI_NSS = SPI_NSS_Soft; //Cau hinh che do chan CS dc quan ly boi Sorfware (1 bit SSI) hay Hardware (1 Pin NSS)
SPI_Init(SPI1, &SPI_InitStruct);
SPI_Cmd(SPI1,ENABLE);
}
uint8_t transmitData(uint8_t data) {
uint8_t receivedData = 0;
SPI_I2S_SendData(SPI1, data);
while (SPI_I2S_GetFlagStatus(SPI1, SPI_I2S_FLAG_TXE) == 0); // Ð?i cho d? li?u du?c truy?n di
while (SPI_I2S_GetFlagStatus(SPI1, SPI_I2S_FLAG_RXNE) == 0); // Ð?i nh?n d? li?u
receivedData = (uint8_t)SPI_I2S_ReceiveData(SPI1);
return receivedData;
}
void lora_write_reg(uint8_t addr, uint8_t cmd) {
uint8_t add = addr | 0x80; // Ð?t bit cao d? ghi
GPIO_WriteBit(SPI1_GPIO, SPI1_NSS, Bit_RESET); // Kích ho?t NSS
transmitData(add);
transmitData(cmd);
GPIO_WriteBit(SPI1_GPIO, SPI1_NSS, Bit_SET);
}
uint8_t lora_read_reg(uint8_t addr) {
uint8_t txByte = addr & 0x7F;
uint8_t rxByte = 0x00;
GPIO_WriteBit(SPI1_GPIO, SPI1_NSS, Bit_RESET);
// Send register address to read
rxByte = transmitData(txByte);
// Deactivate NSS
GPIO_WriteBit(SPI1_GPIO, SPI1_NSS, Bit_SET);
return rxByte; // Return received data
}
uint8_t f1,f2,f3;
void lora_set_frequency(uint64_t freq){
uint64_t frf = ((uint64_t)freq << 19) / 32000000;
lora_write_reg(REG_FRF_MSB, (uint8_t)(frf >> 16));
lora_write_reg(REG_FRF_MID, (uint8_t)(frf >> 8));
lora_write_reg(REG_FRF_LSB, (uint8_t)(frf >> 0));
f1 = lora_read_reg(REG_FRF_MSB);
f2 = lora_read_reg(REG_FRF_MID);
f3 = lora_read_reg(REG_FRF_LSB);
}
uint8_t ret, ret1, ret2, ret3, ret4,ret5, ret6;
uint8_t lora_init(void) {
GPIO_WriteBit(RESET_PORT, SPI1_RESET, Bit_RESET);
delay_ms(10);
GPIO_WriteBit(RESET_PORT, SPI1_RESET, Bit_SET);
delay_ms(10);
ret = lora_read_reg(REG_VERSION);
if (ret != 0x12) {
return 1;
}
// C?u hình các thanh ghi c?a LoRa
lora_write_reg(REG_OP_MODE, (MODE_LONG_RANGE_MODE | MODE_SLEEP));
lora_set_frequency(FREQUENCY[0]);
lora_write_reg(REG_FIFO_TX_BASE_ADDR, 0);
ret1 = lora_read_reg(REG_FIFO_TX_BASE_ADDR);
lora_write_reg(REG_FIFO_RX_BASE_ADDR, 0);
ret2 = lora_read_reg(REG_FIFO_RX_BASE_ADDR);
ret6 = lora_read_reg(REG_LNA);
lora_write_reg(REG_LNA, ret | 0x03);
lora_write_reg(REG_MODEM_CONFIG_3, 0x04);
ret3 = lora_read_reg(REG_MODEM_CONFIG_3);
lora_write_reg(REG_PA_CONFIG, 0x8f);
ret4 = lora_read_reg(REG_PA_CONFIG);
lora_write_reg(REG_OP_MODE, (MODE_LONG_RANGE_MODE | MODE_STDBY));
ret5 = lora_read_reg(REG_PA_CONFIG);
return 0;
}
