2025-04-30 1:06 AM
I am working on a STM32N6570-DK board and I noticed that the CN7 of the board can be modified as digital I/O pin or an ADC. So I want to make sure that when I use the A1 port of CN7 for example, and I want to use this port as a usart_tx. Then I can directly enable the PC10 as a usart_tx and disable the PA9 right? And I want to make sure that the modification don't damage the ADC function of PA9, since the MCU actually accept 0-1.8V and the 3.3V is too high.
Solved! Go to Solution.
2025-04-30 4:13 AM
Hi @Z-YF
Your understanding of the diagram is correct.
If you plan to use CN7-A1 as USART1 digitally with VDD levels of 3.3V, the GPIO PA9 is protected by the AOP U8B and its input divider bridge (signal ARD_A1). When PC10 = 3.3V, PA9=1.8V.
Best regards,
Romain,
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2025-04-30 1:50 AM
2025-04-30 2:02 AM
The board schematics are available on the 'CAD Resources' tab of the Product Page:
https://www.st.com/en/evaluation-tools/stm32n6570-dk.html#cad-resources
2025-04-30 2:37 AM
2025-04-30 4:13 AM
Hi @Z-YF
Your understanding of the diagram is correct.
If you plan to use CN7-A1 as USART1 digitally with VDD levels of 3.3V, the GPIO PA9 is protected by the AOP U8B and its input divider bridge (signal ARD_A1). When PC10 = 3.3V, PA9=1.8V.
Best regards,
Romain,
To give better visibility on the answered topics, please click on Accept as Solution on the reply which solved your issue or answered your question.
2025-04-30 4:15 AM
OK, thank you for your time. :)