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How to change the (STLINK_V3E) MCO HSE Frequency

O.Elsherif
Associate II

That is the ST-link V3 on NUCLEO-H755ZI board.

The HSE MCO option is set to HSE/3, how to change it to HSE/5.

Usually this is configurable in code, but this is ST-link firmware. If there is a way to change the division value, please some one let me know.

1 ACCEPTED SOLUTION

Accepted Solutions
S C
ST Employee

Hello,

Sorry for having missed this topic. The ability to change the MCO source on STLINK-V3E boards has been added in response to another topic: ST-LINK provides 8.08 MHz instead of 8.000 on new ... - Page 3 - STMicroelectronics Community. It has been documented in RN0093 rev23 (11 may 20) and remains in the history of more recent versions. The impact on all other boards UM has been missed, concerning the UM2408 it's all the more a pity as it has been updated afterwards for other things (23 march 21) ...
Technically at that time the aim of the change was to increase the accuracy of the clock, and it has been decided (mainly for graphical interface simplification reason), to provide only a single value based on the HSE, close to the initial 8MHz, and hoping that an additional factor of 24/25 in the PLL could address most cases. We also decided to change the oscillator of the STLINK-V3EC boards back to 24MHz to fix the issue on future boards.
For this case especially, I think we will add the HSE/5 selection in STLink-Upgrade applications. I'm wondering also about the HSE/4 which could also allow other "high" frequency multiples.

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14 REPLIES 14

Hello

MCO clock from STLink is 8MHZ and can't be changed. Is connected to MCU's OSC_IN pin. ( HSE input)

Do you mean some other Divider PLL1 -PLL3 ?

ST-Link/V3 doesn't clock at 8 MHz

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O.Elsherif
Associate II

Here it is.

0693W00000900ayQAA.pngI would like to get some thing accurate that could be multiplied to get 480MHz.

The PLL allows maximum multiplication of 512, which should produce (in my case) 960MHz, after that there is a /2 divider.

A PLL pre-division also exist.

DIVM1: / (1-63).

DIVN1: x (4-512).

DIVP1: / (2-128), with increments of 2.

0693W00000900bwQAA.png

Hello

I ignored this picture with STlink Upgrade MCO freq. Also user manual needs an update.

I think is not possible to take 480 from 8.333 with the existing limitations of PLL1. If DIVM1 is 5, 420 and less is ok if DIVM1 is 3 => 475 , 450, ... etc is ok.

If onboard X2 crystal is present , consider use it .

0693W00000ALyPSQA1.jpg 

O.Elsherif
Associate II

The STLINK-V3 chip is STM32F723IE, and by referring to the (MB1363-H755ZIQ-D01_Schematic) sheet 9 (also page 9) which contains (STLINK_V3E), it shows:

0693W00000AM2zUQAT.png 

By further referring to the datasheet (page 76), it shows:

0693W00000AM2zAQAT.png 

Now, by looking at page 144 in the Reference Manual we see the prescaler setting in the RCC->CFGR register:

0693W00000AM2zFQAT.png 

I need to change this setting (from 3) to (2, 5, or 0 if possible for 25MHz), we should find a way to do this, maybe ST should allow this in the future firmware update, but also if someone knows a way to do this please tell me.

O.Elsherif
Associate II

Actually, I figured out that using the fractional part of the PLL could achieve a good result.

Using the following configuration:

DIVM1: 3

DIVN1: 345

FRACN1: 4915

DIVP1: 2

The equation is: input_frequency / DIVM1 * (DIVN1 + FRACN1 / 2^13) / DIVP1

This would lead to about: 479.99996609

With a difference about: 0.0000339 Hz (%0.0000000706)

I think this would be acceptable.

Uwe Bonnes
Principal II

However there is no public way to set these parameters in the STLINK Api that I know of.

LVan .31
Associate II

-

More than 4 years after ST-LINK V3 based boards came out and more than 2 years after this topic was created - of course it's too soon to ask for a correctly updated documentation from this company... Also the new forum has no ability for other users to add tags to the topic and therefore report issues. And on top of that many of the necessary tags have been removed at all (even for the topic author), including the "Bug-report" and "Documentation" in many forum sub-directories.

@Imen.D , @Peter BENSCH , excellent job, ST!