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How GPIO speed is implemented on hardware lvl

VKlim.1
Associate

Hello! I need to know how GPIO speed control is implemented. Unfortunately, no information was found in the documentation. All that is known is that the signal front is growing faster or slower, but why? I need some hardware schematic or diagram etc., to understand how it works, how it implemented.

1 ACCEPTED SOLUTION

Accepted Solutions
Uwe Bonnes
Principal III

GPIO current is determined by the width of the output trannsistors and slew rate is controlled by a capacitive feedback to the gate of the driving transistors driven with a resistance. GPIO setting switch these parameters, but there is no need for ST to show what they do actual. These are hardware principles used often, and you will find explanation on the net with some digging.

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1 REPLY 1
Uwe Bonnes
Principal III

GPIO current is determined by the width of the output trannsistors and slew rate is controlled by a capacitive feedback to the gate of the driving transistors driven with a resistance. GPIO setting switch these parameters, but there is no need for ST to show what they do actual. These are hardware principles used often, and you will find explanation on the net with some digging.