fatal error: usbpd_ADC_SNK.h: No such file or directory

Robert7 · ‎2024-07-25

Hello,

I try to build a 'PDO SINK' project on B-U585I-IOT02A and I have watched the video How to build an USBPD Sink application using the X-Cube-TCPP software pack - YouTube.

Issue:

After build project on STM32CubeMX 6.12.0 and opened project in STM32CubeIDE 1.13.2, there is errors shows '../TCPP/App/app_tcpp.h:26:10: fatal error: usbpd_ADC_SNK.h: No such file or directory'.

Could you please review attached screenshot and let me know if there is something I'm missing in my project setup.

Best regards,

Robert

Robert7 · ‎2024-08-29

Hello Pascal,

I got another issue during STM32U5+TCPP03-M20 source application test. I want to ask your help.

I use STM32U5+TCPP03-M20 with UCPD interface, and the external protection circuit is to merge consumer and provider paths in a single bi-directional(bi-MOSFET pair) power path. There is one USB-C PD connector for both 5v/9v/12v power(SINK application) adapter and 300mA fan load(SOURCE application, Ra=5.1k).

The TCPP03-M20 datasheet(8.3) provides an example of a combined source/sink path using two Schottky diodes and a 1M resistor. According to the datasheet, I have built the 5V1A SOURCE.

The issue has been found during the SOURCE application test:

1) With the 300mA load connected(see below table #1), the VBUS voltage drops from 5v to 1.78V after bi-MOSFET pair. TCPP03-M20 status: Reg1=0x1c, Reg2=0x20, GDCG=4.530v, GDPG=4.525V, PD_VCONN=3.3V, PD_ENABLE=3.3V, PD_FLGN=3.3V

2) When I write 0x14 to Reg0, the Reg1 read stays at 0x18.

#	PD_ VCONN (V)	PD_ ENABLE (V)	PD_ FLGN (V)	SRC_load (mA)	Q1a_D (V)	Q1b_D (V)	Reg1	Reg2	GDC (V)	GDP (V)	R48 (V)	VBUS_Z (V)
1	3.3	3.3	3.28	300		5	1C	20	4.530	4.525	1.922	1.784
2	3.3	3.3	3.28	300		5	10	20			2.471	4.983
3	3.3	3.3	3.28	300			1C	00	0	0	0	0
4	3.3	3.3	3.28			5	20	00	0	0	0	0
5	3.3	3.3	3.28		5		00	20	8.150	8.159	3.45	4.982
6	3.3	3.3	3.28		5		20	20	8.162	7.798	3.45	4.987
7	3.3	3.3	3.28				20	00	0	0	0	0

I have several questions if you could help me:

1) Is it possible to change the TCPP03-M20 library BSP code to allow using the sourcing gate setting for both sourcing and sinking?

2 Is it possible to turn on/off both GDCG and GDPG at the same time? For example, write 0x18 or 0x14 to Reg0?

3) Is it possible to disconnect one of GDCG and GDPG, only using GDCG or GDPG to turn on/off the bi-MOSFET pair path?

Any feedback would be very appreciated.

Best regards,

Robert Li
Senior Test Engineer | Clarius Mobile Health

MROUV.1 · ‎2024-08-30

Hi Robert,

Thanks for sharing your case.

My usual I2C requests are :

0x00 : hibernate --> only consumer path active / no CC

0x10 : normal mode / consumer --> only consumer path active / CC active

0x1C : normal mode / provider --> only provider path active / CC active

0x18 : normal mode / no Vbus --> no path active / CC active

0x14 to close consumer and provider paths is forbidden by HW (no change as you observed) to prevent any leakage from provider to consumer path.

It is not possible to use provider MOSFET (Q2 on X-NUCLEO-DRP1M1) to drive bi-directional power path when the system is not powered because only the consumer path is active by default to power-up the system.

It is not recommend using consumer MOSFET (Q1 on X-NUCLEO-DRP1M1) to drive bi-directional power path because OCP will not be functional when provider because TCPP03-M20 internal high side amplifier must be ‘oriented’ according to the use case (consumer / provider). OCP when provider is mandatory to protect the system against a defective SINK product (short circuit as example).

According to the behavior of the system, it seems that MOSFET (STL40DN3LLH5) are in linear mode instead of saturation mode.

R48 = 2V confirms that point. Just a warning when performing the source to gate voltage measurement. Multimeter impedance on voltmeter mode must be very high impedance else gate driver current may shunt the current of the gate driver.

Indeed, gate driver current is around 15µA on short circuit.

5µA on R48 (1 MOhm) does not impact the normal behavior of the MOSFET because 10µA can drive the gate capacitance.

Voltage drop of the BAT30F4 (Schottky diode) is less than 0.2V according to figure 4 of the datasheet. It is negligible.

May be there is a leakage somewhere that limits the gate driver.

No Vgs measurement to avoid performance degradation induce by multimeter leakage.

Next, I would recommend checking around gate driver:

Increase R48 to 5 MOhm
No R48, no D6, short instead of D5 : only provider gate driver
No R48, no D5, short instead of D6 : only consumer gate driver
No D6 (D5 and R48 mounted): only provider gate driver merge
No D5 (D6 and R48 mounted): only consumer gate driver merge

To identify / understand the MOSFET unexpected behavior.

Hope, it helps. Let me know,

Best regards,

Mathieu

Robert7 · ‎2024-08-30

Hello Mathieu,

I very appreciate your analysis recommends.

Indeed, I am able to get my setup working after replace R48 with 10 Mohm(I don't have a 5Mohm in hand right now). The GDC/GDP is around 9v (reg1=0x1c, reg2=0x20). Is 'reg2=0x20' indicate VBUS_OK failure? Please also advise if there is any risk by using 10Mohm for Mass Production.

Thank you very much for your help.

Robert

MROUV.1 · ‎2024-09-02

Hello Robert,

Increase R48 from 1MOhm to 10MOhm will increase opening time of MOSFET from around 600µs typical to 6ms typical with STL40DN3LLH5.
It does not affect the normal behavior of Type-C and Power Delivery. When used for protection, the use-cases have been analyzed without identifying any specific risks.

Reg2 = 0x20 indicates VBUS_OK. It is numerical information that indicates that VBUS >_VBUS UVLO (2.4V typ). For system point of view, it can be used to indicate that consumer path is active at start-up.

Best regards,

Mathieu

Robert7 · ‎2024-11-19

Hello Mathieu,

I got a TCPP03-M20 instability issue at the 3A high current charge after increasing R48 from 1MOhm to 5.1MOhm. After checking DS, I found this issue might caused by D5 and D6 current leakage at high PCB temperatures(around 60°C). After replacing D5 and D6 with RB520S-30DP-TP, TCPP03-M20 works normally at high PCB temperatures with DRP settings.

Before our design moves to the production stage, I would appreciate it if you could confirm those changes can be applied to TCPP03-M20.

Best regards,

Robert

MROUV.1 · ‎2024-11-22

Hi Robert,

Thanks for sharing your analysis.

BAT30F4 (0201 package) presents a higher leakage current at 5V (simulation = 50µA at 60°C) than other diodes suggested on the datasheet.

In 0201 package, we propose : NSR01L30NXT5G that presents a low current leakage < 1.2µA current at 5V 75°C.

It’s better than RB520S-30DP-TP that graphical evaluation on datasheet provides around <2.2µA at 5V 75°C.

Designer has run Monte Carlo simulations (process + temperature up to 75°C + Vcc lower case) to check gate diver behavior : all is ok with above proposed diode.

I confirm that the solution is correct up to 75°C with 5MOhm + NSR01L30NXT5G.

Additional analysis is ongoing to recommend optimum diode to increase temperature working range.

Best regards,

Mathieu