2024-02-13 10:16 AM
Hello,
I am trying to achieve the maximum timer clock on the STM32H723ZG for input capturing. In the data sheet is written under Table 4: "The maximum timer clock is up to 550 MHz depending on theTIMPRE bit in the RCC_CFGR register and D2PRE1/2 bits in RCC_D2CFGR register."
I tried to achieve this in the Clock Configuration but it seems like the only solution I found is invalid (see screenshot below). Can I still do that? Or is there another way to do that?
I tried to compile it and it worked without a problem. Sadly I cannot test it on hardware due to delivery.
Thanks in advance!
Solved! Go to Solution.
2024-02-13 12:25 PM
Hello again @Tesla DeLorean @icethi @AScha.3 , thank you for reporting this. I will report this internally to be updated for the next release of the doc. For the Timers mentionned on the table 4 of the datasheet, the maximum frequency is 275MHz.
Best Regards.
STTwo-32
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