2024-11-14 01:59 AM
Hello!
I am working on integrating ST25R3916B into our product based on PSOC 6 CM4. I can read the ID and initialization seems to succeed but I cannot detect any tags.
Setup:
* I am using STEVAL-ST25R3916B reader expansion board with ST25R3916B.
* I have VBUS connected 5V, 3.3v to 3v3. SPI pins are properly connected and can read the ID. IRQ as +ve edge.
* I have attached spi transaction logs, I have the SPI bus connected to the logic analyzer in case if need any transaction through the logic analyzer.
* I have attached rfal_platform.h and have ST25R_COM_SINGLETXRX enabled and spi_transfer handles the SS pin.
Please let me know anything to try, not sure where to start.
Solved! Go to Solution.
2024-11-18 05:18 AM
Hi,
25MHz will not be possible with ST25R3916B. Please check the DS. Fortunately in your trace the SPI is rather at 1.6MHz.
Looking at the trace I find the IRQ pin staying high typically for ~6ms before getting cleared. The timeout handling is happening around <2ms but ISR seems to kick in only after 6ms.
Changing the timeouts is exactly just covering the underlying problems. The values should be fixed and are done in a way that they should pass if proper timer abstraction and interrupt handling is in place.
Regards, Ulysses
2024-11-14 04:07 AM
Hi,
to me it seems the ISR is not handled properly. The software is sending C8 command to turn on the field but ISR is not hitting and no read-out of Interrupt status registers (5A) happens. Then function st25r3916PerformCollisionAvoidance() returns an error and upper layer think field could not get turned on.
I propose to employ ST25R_SELFTEST and see to get basic platform functions operational.
BR, Ulysses
2024-11-14 11:04 AM
Hi @Ulysses HERNIOSUS
Thanks for the quick reply,
I have enabled the self test and it does fail. Attached the transactions and don't see the interrupt.
I have the GPIO interrupt initialized and enabled for positive edge properly and works if I simulate the GPIO pin. But don't see the interrupt from STEVAL-ST25R3916B reader expansion board.
We have the external pullup on this IRQ GPIO, I have it initialized as pulldown, but goes high as soon as it is connected to ST25R3916B and goes and stays low for the entire initialization.
Do you see any issue with this pullup? What should be the GPIO configuration for this IRQ?
2024-11-15 12:58 AM
Hi,
having an external pull-up + internal pull-down is for sure not optimal. Also the digital Saleae traces will not show you the truth here. IRQ should only have a pull-down. ST25R3916B will drive it to VDD as long as interrupt condition persists.
Typically the IRQ pin is only for very short whiles (tens of us) high before the ISR kicks in, reads the interrupt status and thus clears the line again.
Having long high times on IRQ is an indication of issues - most likely in SW.
BR, Ulysses
2024-11-16 01:27 AM
Hi @Ulysses HERNIOSUS
Thanks. I am able to fix the issue with interrupt detection and processing, now seems to get pass the initialization with selftest but still no card detection.
I am working /ST25NFC_Embedded_Lib_ST25R3916(B)_1.7.0/Projects/STM32L476RG-Nucleo/Applications/Common/Src/demo_edta.c. Can you review the captured spi transactions and give me any pointers?
2024-11-17 11:41 PM
Hi,
please feel free to also share directly the Saleae traces, they typically offer a lot more information (timings, IRQ state, etc.).
I the transactions I still find a suspicious sequence:
DSTS 00007809 spi.c 712 Device: NFC, Tx Data:1681
DSTS 00007809 spi.c 756 Device: NFC, Rx Data:0078
DSTS 00007810 spi.c 712 Device: NFC, Tx Data:2300
DSTS 00007810 spi.c 756 Device: NFC, Rx Data:0078
DSTS 00007811 spi.c 712 Device: NFC, Tx Data:C6
DSTS 00007811 spi.c 756 Device: NFC, Rx Data:00
DSTS 00007811 rfal/plf_adaptation.c 118 Timer 2 status 1
DSTS 00007813 rfal/plf_adaptation.c 080 Timer 2 expired
DSTS 00007813 rfal/plf_adaptation.c 082 Timer 2 status 0
DSTS 00007813 spi.c 712 Device: NFC, Tx Data:1685
DSTS 00007814 spi.c 756 Device: NFC, Rx Data:0078
DSTS 00007814 rfal/demo_edta.c 276 Demo Cycle 20, state 2
DSTS 00007817 spi.c 712 Device: NFC, Tx Data:5A00000000
DSTS 00007817 spi.c 756 Device: NFC, Rx Data:0038200000
DSTS 00007914 rfal/demo_edta.c 276 Demo Cycle 21, state 2
So I think still your ISR not correctly operating.
BR, Ulysses
2024-11-18 03:28 AM
Hi @Ulysses HERNIOSUS
Here is the saleae trace, Not able to upload .sal file hope .csv works for you.
Let me know if you find something. I have a worker thread processing the ISR as in /ST25NFC_Embedded_Lib_ST25R3916(B)_1.7.0/Projects/STM32L476RG-Nucleo/Applications/Common/Src/demo_edta.c example. I picked this as I eventually need to exchange T4 data. Let me know if you have any recommendations of simpler examples I can try if the issue is a delay with isr processing.
2024-11-18 03:43 AM
Hi,
csv is not easily readable for me. You can attach .sal when packaged into a .7z or .tar I think.
BR, Ulysses
2024-11-18 04:07 AM
HI @Ulysses HERNIOSUS ,
Here is the .sal file.
BTW, I have to adjust these timeouts for init to succeed.
2024-11-18 04:25 AM
And, my SPI runs at 25MHz. I have other peripherals on the bus.