2025-01-23 07:22 AM
We designed a buck converter with (300-800) input DC voltage and the output voltage is 24V. The max load current is 150mA. We noticed two issues here:
1. The device fails when we try to measure VDD pin voltage with reference to Power Ground (DC input ground). Though the VDD voltage is with reference to device ground (pins 1,2,3,4,6), but why it should fail when we use power ground as a reference with a Digital Multimeter. This has happened thrice and in all the cases, the device failed silently (no sounds, no physical damage etc.,). All this happened at 150V DC input voltage itself.
2. In the second case, the device failed at 800V DC input when we tried to connect 100mA resistive load. No probe is connected anywhere in the circuit. However, we used the same compensation network as given in ST AN 5380 (15V, 1.5W buck converter and could not arrive at the values for 24V output voltage. If the compensation network is a problem, can someone please help us in arriving at the correct values for compensation circuit.
Solved! Go to Solution.
2025-01-23 07:56 AM
Welcome @NSRPrasad, to the commnunity!
Please share your schematics you are testing.
Regards
/Peter
2025-01-23 07:56 AM
Welcome @NSRPrasad, to the commnunity!
Please share your schematics you are testing.
Regards
/Peter
2025-01-23 11:04 PM
Many thanks and nice to get in touch with you Peter. Enclosed the schematic & layout files here. Device fails with or without ZD1 Zener. There was no load at the output when we tried to probe the VDD point with ref. to DC INPUT negative.
Please refer to bottom right-side section for the power supply part layout and traces.
Best Regards and Many thanks once again
2025-01-24 03:27 AM
To further speed up the things, I would request few clarifications/confirmations for the following points:
1. Can the device be used up to 800V DC input as stated in AN 5380 even though the simulation tool does not allow that (allows up to 465V AC RMS max only)?
2. The datasheet for VIPER265k states VDD max as 23.5V and also says it is internally limited. It is actually used for open loop protection also as per datasheet. The question of applying more than 24V to VDD pin does not arise as it shuts down at 23.5V approximately. Hence, the output voltage setting can be >24V with proper resistor divider to reduce VDD voltage. Are these statements correct?
3. The actual problem of device failure still persists at our end and we hope this is not for sure the problem with the chip.
4. Since the tool is not supporting 800V DC input, what changes you recommend in compensation and other critical components.
Best Regards
2025-01-27 08:29 AM
Regards
/Peter
2025-01-27 06:48 PM
1. Thank you for the inputs and we will work around to overcome the issues.
2. The input capacitor value is kept is low as our input voltage is DC from a huge battery bank. However, we review the value based on the amount of line disturbances.
3. In case, if we are unable to get 24Vx150mA power, we move to next higher power device, VIPER267K. In any case, we do not dare now to put a DMM probe at the VDD point.
4. We will post our final observations once we finish our next testing, to bring it to a closure.
Best Regards