1 ACCEPTED SOLUTION
Accepted Solutions
Hello @Hilmi Güney ,
I edited my previous post because I forgot the picture :grinning_face_with_sweat:
I suggest to modify the gate resistors connection to reduce the current unbalance (see picture below).
Any variation, not so much of resistance value, but of gate paths (parasitic inductance and resistance of the traces) will affect current balance.
Each gate path trace must be kept as short as possible, moreover a symmetrical length traces are suggested.
With this configuration you can use two different gate resistors for turn and turn off.
Hello @Hilmi Güney welcome to the ST Community.
You can use the Miller Clamp function connecting the CLAMP pin to the connection point of the MOSFETs gate (refer to below picture).
The CLAMP pin monitors the voltage at the gate connection when the MOSFET is off.
The internal CLAMP switch is activated when the voltage goes below the voltage threshold VCLAMPth, thus creating a low impedance path between the MOSFETs gate and the VL pin.
I am wondering how can i use active miller clamp function 2 paralled mosfets?
Hello @Hilmi Güney ,
I edited my previous post because I forgot the picture :grinning_face_with_sweat:
I suggest to modify the gate resistors connection to reduce the current unbalance (see picture below).
Any variation, not so much of resistance value, but of gate paths (parasitic inductance and resistance of the traces) will affect current balance.
Each gate path trace must be kept as short as possible, moreover a symmetrical length traces are suggested.
With this configuration you can use two different gate resistors for turn and turn off.
