L6981C50DR power module pcb design

[aferjani]

Hi all,

I selected the L6981C50DR for my DC DC buck converter with the following external components and schematic for my application:

• Cin: GRT31CR61H106KE01L Multilayer Ceramic Capacitors MLCC - SMD/SMT 10 uF 50 VDC 10% 1206 X5R AEC-Q200 RoHS Compliant
• CinA: GCM31CR71H105KA55L Multilayer Ceramic Capacitors MLCC - SMD/SMT 1 uF 50 VDC 10% 1206 X7R AEC-Q200 RoHS Compliant
• CvCC: same as CinA
• CBoot: GRT188R71H104KE13D Multilayer Ceramic Capacitors MLCC - SMD/SMT 0.1 uF 50 VDC 10% 0603 X7R AEC-Q200 RoHS Compliant
• L: MSS1038T-333MLC Power Inductors - SMD 33uH Shld 20% 2.3A 93mOhms AECQ2
• Cout: GRJ32EC71E226KE11L Multilayer Ceramic Capacitors MLCC - SMD/SMT 22 uF 25 VDC 10% 1210 X7S

 

My system is powered by a smart battery and I want to use the converter to convert the typ 12.8V from the smart battery to 5V to then feed it to the esp32-c3-devkitm-1. Experimental values showed that the output current is at around 120mA with spikes close to 300mA, I used Iou_max = 500 mA in my calculations to determine the capacitance for the input and output capacitors and also the inductance.

Now I am proceeding with the layout of the PCB on which I will assemble all the parts, could you please suggest a guide or do you have some advices regarding the desing of the PCB?

I am new to this field and especially power modules design area, any remarks or advices would be highly appreciated.

[Peter BENSCH]

Well, the usual rules for switching controllers must be observed, which can already be found in the relevant reference manuals. However, information on similar switching regulators can also be found in application notes, which are also generally applicable here:

The layout of switching DC-DC converters is very important to minimise noise and interference. Power-generating portions of the layout are the main cause of noise and so high switching current loop areas should be kept as small as possible and lead lengths as short as possible.

High impedance paths (in particular the feedback connections) are susceptible to interference, so they should be as far as possible from the high current paths. Particularly with open (non-magnetically shielded) coils, the feedback pin should not be routed under the coil under any circumstances, as the coil's magnetic field will otherwise induce voltages in the feedback path, which can lead to severe instability of the DC/DC.

The input and output loops must be minimised to avoid radiation and high frequency resonance problems.

You can take a look at the layout of the STEVAL-L6981CDR as an example, whose GERBER data can be found in the CAD Resources tab.

Hope that helps?

Good luck!
/Peter