2021-05-17 12:55 AM
2021-05-17 08:11 AM
Hi @Community member ,
The STSPIN32G4 is designed to drive three half bridges, so three high side and three low side MOSFETs.
However you can configure the device in order to drive independently six low side drivers with some limitations:
Anyway, keep the capacitor on each BOOT pin to stabilize the supply of the HS driver: this capacitor is now referred to GND, since OUT pins are referred to GND.
Then consider that the 6 digital input which command the drivers cannot be driven by the advanced timer of the embedded microcontroller.
This configuration, usual when driving HS +LS , cannot be used because the advanced timer has three outputs that are the negated of the other three channels.
So you cannot drive the six drivers independently.
For this reason, I suggest to configure the control pins (from PE8 to PE13) as simple GPIO outputs, so you can set their status independently.
If this post answers to your question consider to mark it as best, by clicking the label "select as best" here below.
2021-05-17 07:58 AM
The STSPIN32G4 has been designed to drive up to three half-bridges for motor applications: The high- and low-side switches of the same half-bridge cannot be simultaneously driven high thanks to an integrated interlocking function. (see datasheet, pg 2).
So the answer is: no, the STSPIN32G4 is not able to control six independent low-side MOSFETs.
If the problem is resolved, please mark this topic as answered by selecting Select as best. This will help other users find that answer faster.
/Peter
2021-05-17 08:11 AM
Hi @Community member ,
The STSPIN32G4 is designed to drive three half bridges, so three high side and three low side MOSFETs.
However you can configure the device in order to drive independently six low side drivers with some limitations:
Anyway, keep the capacitor on each BOOT pin to stabilize the supply of the HS driver: this capacitor is now referred to GND, since OUT pins are referred to GND.
Then consider that the 6 digital input which command the drivers cannot be driven by the advanced timer of the embedded microcontroller.
This configuration, usual when driving HS +LS , cannot be used because the advanced timer has three outputs that are the negated of the other three channels.
So you cannot drive the six drivers independently.
For this reason, I suggest to configure the control pins (from PE8 to PE13) as simple GPIO outputs, so you can set their status independently.
If this post answers to your question consider to mark it as best, by clicking the label "select as best" here below.
2021-05-17 09:36 AM
Thank you both for answering!
@Peter BENSCH I saw that line about the interlocking feature and also the bit Dario quoted about being able to disable it. Would disabling the feature, as proposed by Dario, not work?
@Dario CUCCHI Thank you for the detailed reply!
To give some further information: I'm looking for a reasonable (from costs and integration perspective) way to evaluate switched reluctance motor and controller combinations to replace a 1kW high RPM BLDC setup. The SRMs I'd be able to purchase are 4 phase, the ability to try 5 or 6 phase motors is nice, but not crucial.
From the great write-up by Dario, the datasheet and a dive in CubeMX I can see that TIM1 would actually be able to output channel 4 to PE14, giving four independent channels, no?
2021-05-17 09:39 AM
The answer of @Dario CUCCHI has been the more complete answer, I forgot to mention the interlocking bit.
Regards
/Peter