cancel
Showing results for 
Search instead for 
Did you mean: 

M95512-6RMP EEPROM Doesn't work below 2.6V

DBhut.1
Senior

Hello,

We are using M95512-6RMP with STM32WL5CC, we powered EEROM with STM32WLE5CC Pin. According to M95512-6RMP datasheet its voltage range is 1.8V-5.5V.

I have attached our schematic of EEPORM connection.

Please help us in this case. We want to use EEPROM at minimum of 2.2V.

Thank You

1 ACCEPTED SOLUTION

Accepted Solutions
Paul1
Lead

5. What Hi/Lo voltages are returning to MCU on SPI_MISO? Are those appropriate for your MCU input (Hi & Lo)? How are the data edges looking - are they square or very slow/sloped/delayed compared to when on real power versus GPIO power?

6. Are you familiar with an "eye diagram"? You want a very open eye for your data and clock signals (CLK, MOSI, MISO).

https://www.edn.com/eye-diagram-basics-reading-and-applying-eye-diagrams/

--------------

Given it works at 3.3V but not when powered by the STM32 GPIO, then I'm going back to #1/#3 = Voltage dips. I really think not enough capacitance, especially for fast SPI and EE write.

The voltage dips could be very short, nsec, and difficult to monitor without a very good scope set very carefully to detect small difference, like between 2.6V and 2.2V. Slowing down your data may help detect the issue. Use a zoom on your scope if available to look at all signals during a couple bits (Clk Hi-Lo-Hi-Lo).

** Change: R2/R3 should connect at C1/C2 not GPIO, they need the caps to respond quick.

** What datarate for SPI? I suggest slow till you make it work (100Kbps, not 5Mbps), then speed up, and when you find max then slow down to give a safety margin (10-30%).

So...

a) I take it the 10E in the schematic are 10ohm?

b) Add in parallel to C2 a ceramic 1uF or a ceramic 10uF cap (tantalum better, electrolytic might be too high ESR at 10uF), try for low voltage caps (4V or 6V3) as high voltage might no be same uF at low V.

c) Powerup for longer than 1sec

d) monitor with scope whole time during powerup, you should definitely see a ramp on EE_VCC_pin8 with 10ohm+10uF.

e) Now try your data transfer with the big cap

f) Does it work?

  • If yes great, now optimize for smaller caps and faster timing.
  • If no then need more data, maybe (1) scope capture when GPIO power and (2) scope capture when real 3V3 power, so can see noise differences. Capture SPI_Clk, SPI_Data, and EE_VCC.

Paul

View solution in original post

8 REPLIES 8

What are the physical markings on the top side of the chip?

Schematic was not attached to the top post. You can edit that, or add a new post.

Tips, Buy me a coffee, or three.. PayPal Venmo
Up vote any posts that you find helpful, it shows what's working..
Paul1
Lead
  1. Do you have a decoupling cap on the EEPROM? (Too big or Too small?)
  2. Do you allow sufficient "powerup&stabilize" time after enable the EEPROM Power?
  3. Have you monitored the EEPROM Vcc voltage with a scope during powerup/read/write operations, to see if Vcc is suffering drops or is it always within EEPROM operating range?

Educated guess from similar circuits: Vcc may be dropping too low because of the resistive power path through the STM's pin, causing EE to reset or corrupt the serial commands.

Possible solutions: Add more capacitance on EEPROM Vcc to cover the operations, and allow more time between EE commands/actions for Cap to recharge (also more time at startup for initial cap charging).

Paul

DBhut.1
Senior

I have updated Schematic of EEPROM, please reconsider this.

And to Paul query:

1) Yes 0.1uf and 0.01uf

2) After Power On EEPROM I wait 10ms before any operation on EEPROM.

3) Vcc Supply is stable (By battery) at 2.6V, Verified in oscilloscope.

Paul1
Lead

4. Have you confirmed communications with EE when normally powered at full voltage, like a supply at 3.3VDC ? (Not from ST Pin, just to ensure not a software bug or a configuration setting)

Yes, at 3.3V on Controller, EEPROM works perfectly fine.

Paul1
Lead

5. What Hi/Lo voltages are returning to MCU on SPI_MISO? Are those appropriate for your MCU input (Hi & Lo)? How are the data edges looking - are they square or very slow/sloped/delayed compared to when on real power versus GPIO power?

6. Are you familiar with an "eye diagram"? You want a very open eye for your data and clock signals (CLK, MOSI, MISO).

https://www.edn.com/eye-diagram-basics-reading-and-applying-eye-diagrams/

--------------

Given it works at 3.3V but not when powered by the STM32 GPIO, then I'm going back to #1/#3 = Voltage dips. I really think not enough capacitance, especially for fast SPI and EE write.

The voltage dips could be very short, nsec, and difficult to monitor without a very good scope set very carefully to detect small difference, like between 2.6V and 2.2V. Slowing down your data may help detect the issue. Use a zoom on your scope if available to look at all signals during a couple bits (Clk Hi-Lo-Hi-Lo).

** Change: R2/R3 should connect at C1/C2 not GPIO, they need the caps to respond quick.

** What datarate for SPI? I suggest slow till you make it work (100Kbps, not 5Mbps), then speed up, and when you find max then slow down to give a safety margin (10-30%).

So...

a) I take it the 10E in the schematic are 10ohm?

b) Add in parallel to C2 a ceramic 1uF or a ceramic 10uF cap (tantalum better, electrolytic might be too high ESR at 10uF), try for low voltage caps (4V or 6V3) as high voltage might no be same uF at low V.

c) Powerup for longer than 1sec

d) monitor with scope whole time during powerup, you should definitely see a ramp on EE_VCC_pin8 with 10ohm+10uF.

e) Now try your data transfer with the big cap

f) Does it work?

  • If yes great, now optimize for smaller caps and faster timing.
  • If no then need more data, maybe (1) scope capture when GPIO power and (2) scope capture when real 3V3 power, so can see noise differences. Capture SPI_Clk, SPI_Data, and EE_VCC.

Paul

Are you sure you don't have a M95512-W part?

Show markings on top of IC, ideally with a picture that's cropped, clear and in focus.

Tips, Buy me a coffee, or three.. PayPal Venmo
Up vote any posts that you find helpful, it shows what's working..

thanks Paul, Problem is solved by reducing SPI Frequency (baud rate) to 3MHz, I previously used 6MHz, and according to data sheet M95512-6RMN it works at max 5MHz.