2004-09-15 06:35 AM
2011-05-17 03:02 AM
Is there any way to access the CLOCK as a elegable signal when defining logic equasions in the PLD of upsd micro?
2011-05-17 03:02 AM
uPSD33xx Preliminary Datasheet (May 2004) page 154 “Table 80. DPLD and GPLD input� shows all the input signals that can be used. Which CLOCK signal do you want to use and what for?