Posted on February 26, 2006 at 02:39Hello,
I am using ST10F269-Q3 with custom power supply, which generates RESET signal for MCU. I found in ST10 datasheet, p.103, phrase: ''Depending on crystal frequency,
the on-chip oscillator needs about 10ms to
50ms to stabilize.'' So can you say what delay must be enough between VDD valid (> 4.5 V) and RESET up ? I am using crystal MG3A connected to ST10 with two NPO capacitors 22 pF on GND. Crystal frequency 10 MHz, multiplier = 4. Is there any formula, table or another rule to select this time delay ?
Thank you.
