Problem with UART in MCBSTR9 Board

nanuradha · ‎2006-12-27

Posted on December 28, 2006 at 05:31

nanuradha · ‎2011-05-17

Posted on May 17, 2011 at 09:34

hai,

i am writing some data in the UART->DR register, but it is not same what i wrote. data what i send is 0-0F, but i am getting..... FF,FD,FB,FB,F7,F5,F7,F7,EF,ED,EB,EB,EF,ED,EF.

i don't know why it behaves like this.

here i am sending my code and expect sugessions.

PLEASE HELP REGARDING THIS.

REGARDS

RAJ.

stefano239955_stm1_stmicro · ‎2011-05-17

Posted on May 17, 2011 at 09:34

hi raj,

to test the end of write you are using the flag

UART_FLAG_TxFIFOEmpty.

you have to check the right status register,

something like

UART_FR & (1<

or

UART_FR & (1<

ciao

nanuradha · ‎2011-05-17

Posted on May 17, 2011 at 09:34

hai Stevejamal,

in my program i want to transmit the data to the data register and monitor it on the hyper terminal. for this i have prepared the following code.

UART0->LCR = UART_WordLength_8D | UART_Parity_No | FlowControl_None

& UART_StopBits_1 & UART_FIFO_Disable;

UART0->CR = UART_Mode_Tx | UART_Mode_Rx | 0x0001;

com_baudrate (115200);

for(i=0x0000; i<=0x000f; i++)

{

UART0->DR = i;

while(UART_FR & (1<

GPIO7->DR[0x3FC]= UART0->DR;

for(j=0;j<=0xfff;j++);

}

while(1);

}

in my code i just put the data on the UART0->DR.

but it is not same what i wrote. data what i send is 00-0F, but i am getting..... FF,FD,FB,FB,F7,F5,F7,F7,EF,ED,EB,EB,EF,ED,EF.

if i send 00(0), then the data on UART)->DR is FF(1111 1111)

if i send 01(1), then the data on UART)->DR is FD(1111 1101)

if i send 10(2), then the data on UART)->DR is FB(1111 1011)

if i send 11(3), then the data on UART)->DR is FB(1111 1011)

if i send 100(4), then the data on UART)->DR is F7(1111 0111)

if i send 101(5), then the data on UART)->DR is F5(1111 0101)

if i send 110(6), then the data on UART)->DR is F7(1111 0111)

so like this i am getting data. in hyper termioinal i am monitoring the related ASCII values.

when i Debug my code i have observed these values in data register.

from these values what i observe is my data is there, but it is ORing(|) with FF and Previous value.

one more point is.. in my code i have enabled both TX and Rx (UART_Mode_Tx, UART_Mode_Rx)when i debug,i can monitor the data in UART0_DR as well as Hyper Terminal(ASCII Values).

but if i enable only Tx then i can monitor the data in Hyper terminal (ASCII Values) but not in UART0_DR Register.

i don't know why it behaves like this.

its wonder that if u will help regarding this.

thanks in advance.

raj.

[ This message was edited by: anuradha on 22-12-2006 11:06 ]

stefano239955_stm1_stmicro · ‎2011-05-17

Posted on May 17, 2011 at 09:34

I see that you use

UART0->DR = i;

while(UART_FR & (1<

bit7 is TXFIFO empty

when you send a char the fifo is not empty!

Your code fill the fifo without any check on

fifo full.

In my opinion is better to use

while(UART_FR & (1<

the DR register is shared with RX and TX.

if you have LOOPBACK enable you are able to see what you

are sending reading the DR register.

nanuradha · ‎2011-05-17

Posted on May 17, 2011 at 09:34

hai Stevejamal,

when i enabled the loop back i can able to watch the data in UART->DR.its cool. but when i have enabled only Tx and send the data to the hyperterminal, then i could not watch the data on hyperterminal and

UART->DR register. can u please send me the working example of UART.

here my code is:

UART0->LCR = UART_WordLength_8D | UART_Parity_No | FlowControl_None

& UART_StopBits_1 & UART_FIFO_Disable;

UART0->CR = UART_Mode_Tx | UART_Mode_Rx | 0x0001;

com_baudrate (115200);

for(i=0x0000; i<=0x000f; i++)

{

UART0->DR = i;

while(UART_FR & (1<

GPIO7->DR[0x3FC]= UART0->DR;

for(j=0;j<=0xfff;j++);

}

while(1);

thanks in advance

raj.

stefano239955_stm1_stmicro · ‎2011-05-17

Posted on May 17, 2011 at 09:34

hi raj,

I didn't find the master and peripherals clock initialization

in your demo.

Could you check this settings?

if you have a wrong internal bus clock the baudrate you are

setting is not the ones you'd like to have.

Let me know.

nanuradha · ‎2011-05-17

Posted on May 17, 2011 at 09:34

Hai Stevejamal,

i have configured Fpll to 48Mhz, Fmaster=Fpll,BRCLK=48Mhz, PCLK is also 48Mhz. i have configured all clock settings in Startup file.

please find an attachment.

thanks & regards

raj.

[ This message was edited by: anuradha on 27-12-2006 11:02 ]

nanuradha · ‎2011-05-17

Posted on May 17, 2011 at 09:34

Hai Stevejamal,

please send me the working example Project of UART .

in my program i have configured 48Mhz clock for Fmaster, Fpll, Fpclk, Fbrclk(baudrate clock). already i have send u my code.

expecting updations.

thanks

raj.