2008-10-12 02:17 AM
2008-10-01 02:18 AM
Hi.
I’m working on the STR750 eval board for a new project, and have some trouble with the PLL. It doesn’t seem like the clock changes from 4 MHz when I multiply the clock. The interrupt should toggle a LED about 7.5Hz but instead the frequency is 0.5 Hz.If I change CKSYS to 4 MHz instead of 15x4Mhz the frequency doesn’t change. My configuration: void SystemSetup(void) { //MRCC system reset MRCC_DeInit(); //Wait for OSC4M start-up OSC4MStartUpStatus = MRCC_WaitForOSC4MStartUp(); if(OSC4MStartUpStatus == SUCCESS) { // Set HCLK to 60 MHz MRCC_HCLKConfig(MRCC_CKSYS_Div1); // Set CKTIM to 60 MHz MRCC_CKTIMConfig(MRCC_HCLK_Div1); // Set PCLK to 60 MHz MRCC_PCLKConfig(MRCC_CKTIM_Div1); // Enable Flash burst mode CFG_FLASHBurstConfig(CFG_FLASHBurst_Enable); // Set CKSYS to 60 MHz MRCC_CKSYSConfig(MRCC_CKSYS_OSC4MPLL, MRCC_PLL_Mul_15); } //GPIO pins optimized for 5V operation MRCC_IOVoltageRangeConfig(MRCC_IOVoltageRange_5V); //Enable Timer 1, UART0 and GPIO Clocks MRCC_PeripheralClockConfig(MRCC_Peripheral_TIM0 | MRCC_Peripheral_UART0 | MRCC_Peripheral_GPIO, ENABLE); } And my timer setup: void initTimer(void) { /* TIM Configuration in Output Compare Timing Mode ---------------------------*/ /* CK_TIM = 60 MHz, Prescaler = 4093, TIM0_CLK = CK_TIM/(Prescaler + 1) = 656 KHz */ /* Period = 19 TIM0 Update event frequency = TIM0_CLK/ (TIM_Period+1) = 7.5 Hz */ TIM_InitStructure.TIM_Mode = TIM_Mode_OCTiming; TIM_InitStructure.TIM_Prescaler = 4093; TIM_InitStructure.TIM_ClockSource = TIM_ClockSource_Internal; TIM_InitStructure.TIM_CounterMode = TIM_CounterMode_Down; TIM_InitStructure.TIM_Channel = TIM_Channel_1; TIM_InitStructure.TIM_Period = 1953; TIM_Init(TIM0, &TIM_InitStructure); /* Clear TIM0 flags */ TIM_ClearFlag(TIM0, TIM_FLAG_OC1| TIM_FLAG_OC2| TIM_FLAG_Update); /* Enable TIM0 Update interrupt */ TIM_ITConfig(TIM0, TIM_IT_Update, ENABLE); /* Enable TIM0 counter */ TIM_Cmd(TIM0, ENABLE); } ________________ Attachments : TIM.zip : https://st--c.eu10.content.force.com/sfc/dist/version/download/?oid=00Db0000000YtG6&ids=0680X000006HtO9&d=%2Fa%2F0X0000000aPJ%2FaIhFvgrZscz8wNEVnmiSt4Hc.D8V16BhZPx9lo1WW_M&asPdf=false2008-10-02 01:24 AM
Hi,
The maximum PCLK is 30MHz but in your configuration it is set to 60MHz. Modify the PCLK to 30MHz : MRCC_PCLKConfig(MRCC_CKTIM_Div2); You can also output the HCLK clock on MCO pin (P0.01 pin) to check the frequency value. Chris2008-10-12 02:17 AM
I have tried to change the PCLK clock but without result.
In the testprogram I have tried to remove the MRCC_CKSYSConfig line, and the CKTIM frequency is still the same. Can the PLL be broken on the board?