Memory Mapping for uPSD33xx

lwang · ‎2004-04-04

Posted on April 04, 2004 at 18:37

lwang · ‎2011-05-17

Posted on May 17, 2011 at 11:59

I have a few questions about the memory mapping of uPSD33xx. Could someone help me?

(1) First, a simple one. Can I use 3354 to ''emulate 3312'' by simply (a) do not define CBOOT2-3, (b) restrict FS0-3 to the first 16KB, (c) do not define FS4-7, and (d) restrict RS0 to the first 2KB. Other than the fact that the chip ID is still 3354, is there any difference between this ''emulated 3312'' and a real 3312?

(2) Next, can I map the same physical memory block to two or more logical address blocks (''shadows'')? Can the shadow blocks have different sizes?

Example 1 (shadow blocks have same size), if I define:

CIOP = a15 & a14 & a13 & a12 & a10 & a8;

will these 256 bytes of registers show up at F500-F5FF, F700-F7FF, FD00-FDFF as well as FF00-FFFF?

Example 2 (shadow block has different size), if I define (for 3312 chip):

RS0 = !a15 & !a14 & !a13 & !a12 & !a11

# a15 & !a14 & !a13 & !a12 & a11 & a10 & a9 & a8;

will the entire 2KB SRAM show up at 0000-07FF and will the last 256 bytes of SRAM show up at 8F00-8FFF too?

Can the FS and CSBOOT blocks have similar ''shadows'' too?

(3) Can I use _psen in the address decoding so that a block of Flash may have different address and/or size in xData and Code?

For example, if I define (for 3312 chip):

FS0 = !a15 & !a14 & !a13 & _psen

# a15 & a14 & a13 & !a12 & !_psen;

VM = 14;

will the entire 16KB FS0 show up at 0000-1FFF in Code address space and will the first 8KB FS0 show up at E000-EFFF in xData address space?

Instead of _psen, can _rd or _wr be used in a similar way?

Can CSBOOT be selected in the same way?

(4) Just to make sure, if SRAM overlaps Flash in xData, can accessing SRAM accidentally alter the Flash?

For example, if I define (for 3333 chip):

FS0 = !a15 & !a14 & !a13;

RS0 = !a15 & !a14 & !a13 & !a12;

VM = 14;

then the 4KB of SRAM shows up at xData 0000-0FFF and overlaps the first half of the 16KB of FS0 at xData 0000-1FFF. Will writing of 55 or AA to 0AAA or 0555 of the SRAM etc. accidentally erase or alter the FS0 Flash?

[ This message was edited by: Lichen on 01-04-2004 17:19 ]

joseph2399 · ‎2011-05-17

Posted on May 17, 2011 at 11:59

1. Why don't you use a 3312 instead of a 3354? What you described sounds OK/correct.

2. Yes the SRAM (RS) and Flash memory (FS and CSBOOT) blocks can be mapped to several logical address blocks and they can have different sizes.

3. Sounds like you are wanting to use the Combined Space Modes (pg 82 of the uPSD33xx data sheet (Sept 2003). If so, follow the guidelines there.

4. Refer to Figure 34 on page 81 of the uPSD33xx data sheet (Sept 2003). It shows the priority level of memory and I/O components in the PSD Module. Whatever is written to the higher level memory component does not also get written to the lower level.

lwang · ‎2011-05-17

Posted on May 17, 2011 at 11:59

Thanks.

I want to use the same DK3300 to develope code for 3321 as well as 3334 etc. Thus the attempt to ''simulate'' without replacing the chip in DK3300.