2008-05-04 09:39 PM
2011-05-17 12:52 AM
Hi,
I'm trying (unsuccessfully) to implement interrupt nesting on an STR91. Following the advice contained here: , I've created an ASM wrapper for my 'interruptable' UART Tx ISR. Contary to advice I've seen elsewhere, this isn't using an SWI, which I thought was necessary... The UART coughs out a couple of characters, after which I find myself stuck looping around the default DAbtHandler. Is this symptomatic of what I've read elsewhere on this forum regarding erroneous addresses served up by the VIC? -I hadn't experienced this prior to attempting the nesting of IRQ's. If anyone can suggest a 'simple' means to achieve interrupt pre-emption by higher priorty IRQ's, I'd be very grateful. Thanks David2011-05-17 12:52 AM
Hi,
We have already published in the Web an Application note explaining the mechanism of the interrupt management hardware in the STR91x microcontroller family, with software recommendations for interrupt handling.It can be helpful for you. Please go through this link: Regards, Eris.