2004-11-24 12:19 PM
2011-05-17 02:36 AM
Good morning to everyone!!
Theseday, i am working a slave mode between two ST9s. One of ST9 is a master mode and another is a slave mode. I believe that master mode is working well, becaues i have used it with some slave devices. It is problem that ST9(slave mode) does not match slave address (I2COAR1, 7 bit mode) I want to set a slave address which is 0x08 (7bit mode by I2COAR1) Please, check files attached below. #define __I2C_C__ #include ''device.h'' #include ''i2c.h'' static unsigned char i2c_sr1; static unsigned char i2c_sr2; static unsigned char *i2c_data; void I2cInit( void ) { I2cPortInit(); spp(I2C_PG); // Set the frequency bits before enabling the interface I2COAR2 = 0xC0; // I2C Own Address Register 2 // - INTCLK between 14 and 30MHz (24MHz) // - 7-bit mode I2CCR = 0x00; // I2C Control Register // - peripheral OFF // Init interrupt I2CISR = 7; // I2C Status Register I2CIVR = 0x30; // I2C Vector register // 30h : not used // 32h : error condition detected // 34h : data received // 36h : I2C ready to transmit I2CIMR = I2Cm_IERRM | I2Cm_IRXM | I2Cm_ITXM; // I2C Interrupt Mask Register // - all 3 interrupt sources enabled // Init I2C config registers I2CECCR = 0x00; // I2C Extended Clock Control Register // - CC8-CC7 init (0 !) I2CCCR = 0x92; // fast mode, 400khz I2CADR = 0x08; // I2C General Call address // - general call address to be recognized by the device in slave mode I2CCR = (I2Cm_PE | I2Cm_ACK | I2Cm_ITE); I2CCR = (I2Cm_PE | I2Cm_ACK | I2Cm_ITE); // ENGC bit is cleared // don't use I2C General Call address } /* end of I2cInit() */ void I2cPortInit (void) { OUT_AFOD( 4, 6 ); OUT_AFOD( 4, 7 ); P4DR |= 0xC0; } /* end of I2cPortInit() */ void I2cIsr (void) { int i; spp(I2C_PG); // Target I2C control registers page //Save status registers in static user variables i2c_sr1 = I2CSR1; i2c_sr2 = I2CSR2; // Stop detection bit mask or bus error or ack mask if ((i2c_sr2 & I2Cm_STOPF) || (i2c_sr2 & I2Cm_AF) || (i2c_sr2 & I2Cm_BERR)) { I2CCR |= I2Cm_STOP; } if (i2c_sr1 & I2Cm_ADSL) //slave mode : EV1 { *i2c_data = I2CDR; // then send stop bit } if (i2c_sr1 & I2Cm_BTF) // EV2 { *i2c_data++ = I2CDR; if (i2c_sr2 & I2Cm_STOPF) // EV4 { I2CCR |= I2Cm_STOP; // then send stop bit } } } // end of I2cIsr #pragma interrupt I2cErrIsr void I2cErrIsr (void) { save_page; // Save peripheral page pointer before modifying it spp(I2C_PG); // Target I2C control registers page I2CISR &= ~I2Cm_IERRP; // Clear Error Interrupt Flag I2cIsr(); restore_page; } /* end of I2cErrIsr() */ #pragma interrupt I2cRxIsr void I2cRxIsr (void) { save_page; spp(I2C_PG); I2CISR &= ~I2Cm_IRXP; // Clear Receive Interrupt Flag I2cIsr(); restore_page; } /* end of I2cRxIsr() */ #pragma interrupt I2cTxIsr void I2cTxIsr (void) { save_page; spp(I2C_PG); I2CISR &= ~I2Cm_ITXP; // Clear Transmit Interrupt Flag I2cIsr(); restore_page; } /* end of I2cTxIsr() */ :o