How to set wait-state for XFLASH

[llehmann9]

Posted on February 23, 2011 at 16:31

Hello everybody,

I am using a ST0F276Z at 64MHz. In the User Manual (UM0409 - Rev2 - Oct 2007) on page 42 i read: ''The ST10F276Zx reserves an address area of 512+320 Kbytes for on-chip Flash memory. [...] The second portion [of flash](320 Kbytes) appears like an on-chip X-Peripheral: it can be accessed like an external memory in 16-bit demultiplexed bus-mode without read/write delay at zero wait-states with CPU frequency up to 40 MHz, while one wait-state should be added for higher frequency rates.'' I wounder how to add these wait states? Somewhere else I read, that the bus configuration registers of the X-Peripherals are normally hard wired. These ''registers'' are called XBCONx and XADRSx. Except of XADRS3, i did not found setup information about these registers. Question: How can I realize the recommended wait state, when using the processor at 64 MHz. Kind regards Lars

[aubenas.charles]

Posted on June 13, 2011 at 14:18

Hi Lars,

You don't have to take care of the wait states for XFlash. Access times are handled internally. The XFlash is providing a ''ready'' signal to the XBus that is used th lengthen to access time when the frequency is above 40MHz. The statement on page 42 is intendend to highlight the performances of the code executed from XFlash.