How to detect internal read errors of an EEPROM (M95M04) (not) corrected by ECC.

[swal]

Hi,

The datasheet of the M95M04-DR 4-Mbit serial SPI bus EEPROM (https://www.st.com/en/memories/m95m04-dr.html) mentions on page 24 the device is implementing "Error correction code (ECC x 4)".

What is the method to be impelennted on the microcontroller to be informed when the ECC did (or even did not) correct an internal error.

I want to use this information to predict some kind of wear level for that memory group.

And may be release myself of the burden to implement CRC checks on my data myself.

Thanks

Stefan

[Peter BENSCH · Accepted solution]

Welcome @swal, to the community!

Please read AN2440, section 2 and 4, which explains the ECC feature in more detail (even it targets automotive EEPROMs). As bit errors occur extremely rarely at more than 1 bit/byte and single bit failures can be corrected without any problems, no signalling of an error correction has been implemented. There is therefore no way for the controlling MCU to recognise that an error correction has taken place.

Nevertheless, it is questionable whether wear levelling as with NAND flash needs to be implemented in view of the considerably higher number of write cycles

Hope that helps?

Regards
/Peter

[Tesla DeLorean]

TBH the most probably cause of data loss will be your interactions with the memory, and how these correlate to the power supply, and loss of power.

The only way to have any awareness of this is from the use of CRC or Reed-Solomon ECC type error detection/correction methods in an end-to-end sense, where you're actively managing and securing your data sets on the media.