Posted on February 27, 2006 at 10:49I have had some requests to post details of the GPIO bug in the STR71x Software Library that I mentioned in an unrelated post.
Basically the issue is that if you have any I/O line configured as weak pull up or weak pull down and you use the library to change the configuration or state of any OTHER bit on that port then it may get changed from a weak pull up to a week pull down or vice versa. Problem is Library doco says other lines are not effected but they definitely are.
This is really a function of the processor that has been overlooked in documenting the library. What happens is when you do a read modify write on a I/O port the pins that are weak pull up or down you read the INPUT STATE and then when the write is done it writes to the PULLUP DIRECTION (UP or DOWN).
This is a common scenario - you have a push button to ground with a weak pullup and you modify a different pin on the same port when the push button is pressed and the pull up will become a weak pulldown and the switch will appear always on - until next reset at least.
The work around is quite involved and should probably only be implemented if the above is an issue in the application.
To get around the problem you need to keep two additional PD masking registers in memory so that weak pull up/down input bits in the PD register can be force to be written high or low regardless of the input state.
I am sure ST plans to include an example of this when they correct library or doco.
