2007-06-07 06:18 AM
Discrepancy found: STR71x uC FAMILY - REFERENCE MANUAL Rev. 8
2007-06-04 09:17 AM
This is also the case in Rev. 5 and Rev. 7 of the same manual (in difference Chapter/Table):
Chapter: 15 APB BRIDGE REGISTERS Register: APBn_CKDIS This register states that only bits 14:0 are used (15 bits), while 31:15 are reserved. However, as per Table 3 on page 14: APB2 memory map, we should have 16 bits used. Can anyone please confirm that the first 16 bits of the APBn_CKDIS register should be used? Thanks, Chuck. [ This message was edited by: adi on 04-06-2007 21:48 ]2007-06-05 07:02 AM
No, everything is correct. It says:
'Bit 0 controls the peripheral in position 1 (I2C0 for APB1 or XTI for APB2) and so on.' Taking this shift into account, you only need 15 bits in the register. - mike2007-06-05 07:14 AM
Thank you Mike, you are correct :D !
Regards, Chuck.2007-06-07 06:18 AM
Yes we confirm, only the first 15 bits 14:0 of both registers APBn_CKDIS and APBn_SWRES are used: the bit 0 controls the I2C0 on APB1 or XTI on APB2.
Thanks.