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Discrepancy found: STR71x uC FAMILY - REFERENCE MANUAL Rev. 8

chuckwong
Associate II
Posted on June 07, 2007 at 15:18

Discrepancy found: STR71x uC FAMILY - REFERENCE MANUAL Rev. 8

4 REPLIES 4
chuckwong
Associate II
Posted on June 04, 2007 at 18:17

This is also the case in Rev. 5 and Rev. 7 of the same manual (in difference Chapter/Table):

Chapter: 15 APB BRIDGE REGISTERS

Register: APBn_CKDIS

This register states that only bits 14:0 are used (15 bits), while 31:15 are reserved. However, as per Table 3 on page 14: APB2 memory map, we should have 16 bits used.

Can anyone please confirm that the first 16 bits of the APBn_CKDIS register should be used?

Thanks,

Chuck.

[ This message was edited by: adi on 04-06-2007 21:48 ]

kleshov
Associate II
Posted on June 05, 2007 at 16:02

No, everything is correct. It says:

'Bit 0 controls the peripheral in position 1 (I2C0 for APB1 or XTI for APB2) and so on.'

Taking this shift into account, you only need 15 bits in the register.

- mike

chuckwong
Associate II
Posted on June 05, 2007 at 16:14

Thank you Mike, you are correct :D !

Regards,

Chuck.

kaouther
Associate II
Posted on June 07, 2007 at 15:18

Yes we confirm, only the first 15 bits 14:0 of both registers APBn_CKDIS and APBn_SWRES are used: the bit 0 controls the I2C0 on APB1 or XTI on APB2.

Thanks.