2007-01-25 09:52 AM
2007-01-09 09:41 PM
Hello!
I am looking for some help for my SPI problem! (We use a STR711 on the IAR KickstartKit, The software library used is V3.1 13/01/2006) I configured SPI1 as master. After sending a byte i want to read any received data. As i have to wait until the data is indeed clocked out before reading the receive data from the receive buffer, we need some wait statements. to allow a minimum waiting time (independent of the current clock confugurations) I check the ''BSPI_RFNE'' flag of the SPI1 CSR2 register using the following functions of the ST software library: BSPI_WordSend(BSPI1, 0x11); while ( !BSPI_FlagStatus(BSPI1, BSPI_RFNE) ); //wait until data received DummyVariable++; ReceivedChar = (u8)BSPI_WordReceive(BSPI1); When running this code i never get to the last line of this example. When analysing the code with the emulator I see that the flag BSPI_RFNE is set after the sending command but will be reset on the following command. I do not understand what is wrong. Especially as in the ReferenceManual is stated that the flag will only be reset when the data is read from the receive buffer... I hope for any useful advices as it is quite urgent!!! Thanks ahead Beat [ This message was edited by: bvb on 10-01-2007 11:19 ]2007-01-14 06:55 PM
I still could not figure out the problem described above. Is there someone who can help me?
What ist the meaning of the status flag ''BSPI_RFNE''? In the meantime I changed my code and I do not use this flag for my spi driver software. But to reach maximum speed when writing multiple bytes I still think that it is better to wait for the status bit ''BSPI_RFNE'' and send the next byte when the bit is set. Thanks in advance for your help, Beat2007-01-14 09:45 PM
Hello,
I'm using STR712 with GNU-Compiler, so I don't use the standard library. Heere is the code that works in my project. // send one Data Word BSPI1->TXR = uwDataV; // wait until TFIFO is empty while(!(BSPIx->CSR2 & SPI_TFIFO_E)); // SPI_TFIFO_E = 0x0040 // read one Data Word from Buffer of SPI ulBufferMessagCntrT = 0; while (ulBufferMessagCntrT < 1) { //check if there are data in Buffer of SPI if (BSPIx->CSR2 & SPI_RFIFO_NE) // SPI_RFIFO_NE = 0x0008; { uwDummyDataT = BSPIx->RXR; // read data from Buffer ulBufferMessagCntrT++; // increment count of messages } } Your code shold work in my opinion, too. But perhaps this can help you. Best regards Ivunin2007-01-15 09:23 PM
Hallo Ivunin,
thanks for your help. I see that you are also evaluating the Bit3 of the CSR2 register of the SPI to check if any data was received. However in my code it does not seem to work: Well I once more checked my code and I still have no idea what is wrong!? I checked also the disassembly while debbuging and there I can see, that always after a write to the TXR register the flag RFNE is set but immediately aftwerwards cleared before any data is read from the receive buffer. I added a picture with the debug window. The breakpoint is set on the write to the TXR register. The window shows also the registers of the SPI1. The RFNE-bit is set as expected. However on the next assembly command (POP) the bit RFNE and also the bit RFF will be reset!!! Is there anyone who experienced similar problems?! Might there be a problem with the debbuging settings? Well I think this would be a bit strange as all the other registers do not show any problems. Hope to get this solved soon, Beat ________________ Attachments : disassembly_bspi1_RFNE-flag.jpg : https://st--c.eu10.content.force.com/sfc/dist/version/download/?oid=00Db0000000YtG6&ids=0680X000006HtC3&d=%2Fa%2F0X0000000aKA%2F9gI83bYbjJuKwzZO5NA6Qq9n88yOdlD.vmk4f1UyOPo&asPdf=false2007-01-16 10:37 PM
Doesn't debugger read the data register - let's say, refresh the register window? This might clear the reception FIFO.