Posted on September 19, 2006 at 12:18yes I'm sure. the analog input is very stable. I did the same test with a different microcontroller and the results were fine.
Here is some code of the initialisation and the interrupt handler
Code:
/*************************** FUNCTION ************************************/
bool init_adc_module(void)
/*************************** INFO ****************************************
**
** DESCRIPTION : Init adc module.
**
** INPUT :
**
** OUTPUT :
**
** RETURN : TRUE, initialisation was successfully.
**************************************************************************/
{
uint16 Tmp;
uint8 cnt;
for(cnt=0; cnt < MAX_ADC_INPUTS; cnt++)
{
adc_data[cnt].adc_active = FALSE;
adc_data[cnt].adc_delayint_active = FALSE;
adc_data[cnt].adc_delayint_samples = 0;
}
config_gpio_port(PORT_1, 1, GPIO_INPUT_ANALOG);
config_irq_channel_priority(IRQ_CHANNEL_ADC, IRQ_PRIORITY_ADC);
config_irq_channel(IRQ_CHANNEL_ADC, ENABLE);
config_interrupts(ENABLE);
ADC12->CSR = 0x0000; // reset status register
ADC12->CPR = 0x0010; // set prescaler
ADC12->CSR |= 0x0F00; // enable interrupts for all channels
PCU->BOOTCR |= 0x0020; // set adc_en bit
do
{
Tmp=ADC12->CSR;
}
while((Tmp & 0x000F) == 0);
enable_timer_process(TMR_handle_adc_inputs);
return(TRUE);
}
/*************************** FUNCTION ************************************/
void adc_isr(void)__arm
/*************************** INFO ****************************************
**
** DESCRIPTION : adc interrupt for all channels
**
** INPUT :
**
** OUTPUT :
**
** RETURN :
**************************************************************************/
{
static uint8 adc_cnt = 1;
uint8 cnt;
sint16 adc_sample;
ADC_DATA_REC *adc;
for(cnt = 0; cnt < MAX_ADC_INPUTS; cnt++)
{
if(ADC12->CSR & (0x01 << cnt))
{
ADC12->CSR &= ~(0x01 << cnt);
switch(cnt)
{
case INP_ADC0:
adc_sample = (ADC12->DATA0);
break;
case INP_ADC1:
adc_sample = ADC12->DATA1;
break;
case INP_ADC2:
adc_sample = ADC12->DATA2;
break;
case INP_ADC3:
adc_sample = ADC12->DATA3;
break;
}
adc_sample = (uint16)(adc_sample >> 4);
adc = &(adc_data[cnt]);
adc->adc_buf[adc->adc_buf_write_point] = adc_sample;
adc->adc_buf_write_point++;
if(adc->adc_buf_write_point >= ADC_BUFLEN)
{
adc->adc_buf_write_point = 0;
}
if(adc->adc_delayint_active && (--adc_cnt) == 0)
{
adc_cnt = adc->adc_delayint_samples;
delayed_int = TRUE;
}
}
}
}
